mirror of https://github.com/acidanthera/audk.git
73 lines
1.9 KiB
C
73 lines
1.9 KiB
C
/** @file
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C based implemention of IA32 interrupt handling only
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requiring a minimal assembly interrupt entry point.
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Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _CPU_GDT_H_
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#define _CPU_GDT_H_
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//
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// Local structure definitions
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//
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#pragma pack (1)
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//
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// Global Descriptor Entry structures
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//
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typedef struct _GDT_ENTRY {
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UINT16 Limit15_0;
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UINT16 Base15_0;
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UINT8 Base23_16;
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UINT8 Type;
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UINT8 Limit19_16_and_flags;
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UINT8 Base31_24;
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} GDT_ENTRY;
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typedef
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struct _GDT_ENTRIES {
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GDT_ENTRY Null;
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GDT_ENTRY Linear;
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GDT_ENTRY LinearCode;
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GDT_ENTRY SysData;
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GDT_ENTRY SysCode;
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GDT_ENTRY LinearCode64;
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GDT_ENTRY Spare4;
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GDT_ENTRY Spare5;
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} GDT_ENTRIES;
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#pragma pack ()
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#define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
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#define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
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#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
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#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
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#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
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#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
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#define SPARE4_SEL OFFSET_OF (GDT_ENTRIES, Spare4)
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#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
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#if defined (MDE_CPU_IA32)
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#define CPU_CODE_SEL LINEAR_CODE_SEL
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#define CPU_DATA_SEL LINEAR_SEL
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#elif defined (MDE_CPU_X64)
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#define CPU_CODE_SEL LINEAR_CODE64_SEL
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#define CPU_DATA_SEL LINEAR_SEL
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#else
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#error CPU type not supported for CPU GDT initialization!
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#endif
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#endif // _CPU_GDT_H_
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