mirror of https://github.com/acidanthera/audk.git
195 lines
5.7 KiB
C
195 lines
5.7 KiB
C
/** @file
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Generic ARM implementation of TimerLib.h
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Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseLib.h>
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#include <Library/TimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/ArmArchTimerLib.h>
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#define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)
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RETURN_STATUS
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EFIAPI
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TimerConstructor (
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VOID
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)
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{
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// Check if the ARM Generic Timer Extension is implemented
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if (ArmIsArchTimerImplemented ()) {
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UINTN TimerFreq;
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// Check if Architectural Timer frequency is valid number (should not be 0)
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ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz));
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// Check if ticks/uS is not 0. The Architectural timer runs at constant
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// frequency irrespective of CPU frequency. According to General Timer Ref
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// manual lower bound of the frequency is in the range of 1-10MHz
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ASSERT (TICKS_PER_MICRO_SEC);
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#ifdef MDE_CPU_ARM
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// Only set the frequency for ARMv7. We expect the secure firmware to have already do it
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// If the security extensions are not implemented set Timer Frequency
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if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {
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ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
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}
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#endif
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// Architectural Timer Frequency must be set in the Secure privileged(if secure extensions are supported) mode.
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// If the reset value (0) is returned just ASSERT.
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TimerFreq = ArmArchTimerGetTimerFreq ();
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ASSERT (TimerFreq != 0);
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} else {
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DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library can not be used.\n"));
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ASSERT (0);
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}
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return RETURN_SUCCESS;
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}
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/**
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Stalls the CPU for the number of microseconds specified by MicroSeconds.
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@param MicroSeconds The minimum number of microseconds to delay.
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@return The value of MicroSeconds inputted.
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**/
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UINTN
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EFIAPI
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MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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UINT64 TimerTicks64;
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UINT64 SystemCounterVal;
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// Calculate counter ticks that can represent requested delay
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TimerTicks64 = MultU64x32 (MicroSeconds, TICKS_PER_MICRO_SEC);
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// Read System Counter value
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SystemCounterVal = ArmArchTimerGetSystemCount ();
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TimerTicks64 += SystemCounterVal;
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// Wait until delay count is expired.
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while (SystemCounterVal < TimerTicks64) {
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SystemCounterVal = ArmArchTimerGetSystemCount ();
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}
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return MicroSeconds;
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}
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/**
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Stalls the CPU for at least the given number of nanoseconds.
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Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
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Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
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@param NanoSeconds The minimum number of nanoseconds to delay.
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@return The value of NanoSeconds inputed.
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**/
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UINTN
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EFIAPI
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NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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UINTN MicroSeconds;
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// Round up to 1us Tick Number
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MicroSeconds = NanoSeconds / 1000;
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MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
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MicroSecondDelay (MicroSeconds);
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return NanoSeconds;
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}
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/**
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Retrieves the current value of a 64-bit free running performance counter.
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The counter can either count up by 1 or count down by 1. If the physical
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performance counter counts by a larger increment, then the counter values
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must be translated. The properties of the counter can be retrieved from
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GetPerformanceCounterProperties().
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@return The current value of the free running performance counter.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounter (
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VOID
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)
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{
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// Just return the value of system count
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return ArmArchTimerGetSystemCount ();
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}
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/**
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Retrieves the 64-bit frequency in Hz and the range of performance counter
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values.
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If StartValue is not NULL, then the value that the performance counter starts
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with immediately after is it rolls over is returned in StartValue. If
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EndValue is not NULL, then the value that the performance counter end with
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immediately before it rolls over is returned in EndValue. The 64-bit
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frequency of the performance counter in Hz is always returned. If StartValue
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is less than EndValue, then the performance counter counts up. If StartValue
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is greater than EndValue, then the performance counter counts down. For
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example, a 64-bit free running counter that counts up would have a StartValue
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of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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@param StartValue The value the performance counter starts with when it
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rolls over.
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@param EndValue The value that the performance counter ends with before
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it rolls over.
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@return The frequency in Hz.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounterProperties (
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OUT UINT64 *StartValue, OPTIONAL
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OUT UINT64 *EndValue OPTIONAL
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)
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{
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if (StartValue != NULL) {
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// Timer starts with the reload value
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*StartValue = (UINT64)0ULL ;
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}
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if (EndValue != NULL) {
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// Timer counts down to 0x0
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*EndValue = 0xFFFFFFFFFFFFFFFFUL;
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}
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return (UINT64)ArmArchTimerGetTimerFreq ();
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}
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