mirror of https://github.com/acidanthera/audk.git
917 lines
34 KiB
NASM
917 lines
34 KiB
NASM
;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;* start.asm
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;*
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;* Abstract:
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;*
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;------------------------------------------------------------------------------
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.model small
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.stack
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.486p
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.code
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FAT_DIRECTORY_ENTRY_SIZE EQU 020h
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FAT_DIRECTORY_ENTRY_SHIFT EQU 5
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BLOCK_SIZE EQU 0200h
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BLOCK_MASK EQU 01ffh
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BLOCK_SHIFT EQU 9
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org 0h
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Ia32Jump:
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jmp BootSectorEntryPoint ; JMP inst - 3 bytes
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nop
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OemId db "INTEL " ; OemId - 8 bytes
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SectorSize dw 0 ; Sector Size - 16 bits
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SectorsPerCluster db 0 ; Sector Per Cluster - 8 bits
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ReservedSectors dw 0 ; Reserved Sectors - 16 bits
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NoFats db 0 ; Number of FATs - 8 bits
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RootEntries dw 0 ; Root Entries - 16 bits
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Sectors dw 0 ; Number of Sectors - 16 bits
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Media db 0 ; Media - 8 bits - ignored
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SectorsPerFat dw 0 ; Sectors Per FAT - 16 bits
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SectorsPerTrack dw 0 ; Sectors Per Track - 16 bits - ignored
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Heads dw 0 ; Heads - 16 bits - ignored
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HiddenSectors dd 0 ; Hidden Sectors - 32 bits - ignored
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LargeSectors dd 0 ; Large Sectors - 32 bits
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PhysicalDrive db 0 ; PhysicalDriveNumber - 8 bits - ignored
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CurrentHead db 0 ; Current Head - 8 bits
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Signature db 0 ; Signature - 8 bits - ignored
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VolId db " " ; Volume Serial Number- 4 bytes
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FatLabel db " " ; Label - 11 bytes
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SystemId db "FAT12 " ; SystemId - 8 bytes
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BootSectorEntryPoint:
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ASSUME ds:@code
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ASSUME ss:@code
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; ds = 1000, es = 2000 + x (size of first cluster >> 4)
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; cx = Start Cluster of EfiLdr
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; dx = Start Cluster of Efivar.bin
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; Re use the BPB data stored in Boot Sector
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mov bp,07c00h
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push cx
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; Read Efivar.bin
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; 1000:dx = DirectoryEntry of Efivar.bin -> BS.com has filled already
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mov ax,01900h
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mov es,ax
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test dx,dx
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jnz CheckVarStoreSize
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mov al,1
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NoVarStore:
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push es
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; Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl
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mov byte ptr es:[4],al
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jmp SaveVolumeId
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CheckVarStoreSize:
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mov di,dx
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cmp dword ptr ds:[di+2], 04000h
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mov al,2
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jne NoVarStore
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LoadVarStore:
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mov al,0
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mov byte ptr es:[4],al
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mov cx,word ptr[di]
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; ES:DI = 1500:0
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xor di,di
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push es
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mov ax,01500h
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mov es,ax
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call ReadFile
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SaveVolumeId:
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pop es
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mov ax,word ptr [bp+VolId]
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mov word ptr es:[0],ax ; Save Volume Id to 0:19000. we will find the correct volume according to this VolumeId
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mov ax,word ptr [bp+VolId+2]
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mov word ptr es:[2],ax
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; Read Efildr
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pop cx
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; cx = Start Cluster of Efildr -> BS.com has filled already
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; ES:DI = 2000:0, first cluster will be read again
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xor di,di ; di = 0
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mov ax,02000h
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mov es,ax
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call ReadFile
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mov ax,cs
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mov word ptr cs:[JumpSegment],ax
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JumpFarInstruction:
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db 0eah
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JumpOffset:
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dw 0200h
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JumpSegment:
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dw 2000h
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; ****************************************************************************
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; ReadFile
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;
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; Arguments:
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; CX = Start Cluster of File
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; ES:DI = Buffer to store file content read from disk
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;
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; Return:
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; (ES << 4 + DI) = end of file content Buffer
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;
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; ****************************************************************************
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ReadFile:
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; si = NumberOfClusters
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; cx = ClusterNumber
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; dx = CachedFatSectorNumber
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; ds:0000 = CacheFatSectorBuffer
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; es:di = Buffer to load file
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; bx = NextClusterNumber
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pusha
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mov si,1 ; NumberOfClusters = 1
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push cx ; Push Start Cluster onto stack
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mov dx,0fffh ; CachedFatSectorNumber = 0xfff
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FatChainLoop:
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mov ax,cx ; ax = ClusterNumber
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and ax,0ff8h ; ax = ax & 0xff8
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cmp ax,0ff8h ; See if this is the last cluster
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je FoundLastCluster ; Jump if last cluster found
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mov ax,cx ; ax = ClusterNumber
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shl ax,1 ; ax = ClusterNumber * 2
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add ax,cx ; ax = ClusterNumber * 2 + ClusterNumber = ClusterNumber * 3
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shr ax,1 ; FatOffset = ClusterNumber*3 / 2
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push si ; Save si
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mov si,ax ; si = FatOffset
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shr ax,BLOCK_SHIFT ; ax = FatOffset >> BLOCK_SHIFT
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add ax,word ptr [bp+ReservedSectors] ; ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)
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and si,BLOCK_MASK ; si = FatOffset & BLOCK_MASK
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cmp ax,dx ; Compare FatSectorNumber to CachedFatSectorNumber
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je SkipFatRead
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mov bx,2
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push es
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push ds
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pop es
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call ReadBlocks ; Read 2 blocks starting at AX storing at ES:DI
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pop es
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mov dx,ax ; CachedFatSectorNumber = FatSectorNumber
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SkipFatRead:
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mov bx,word ptr [si] ; bx = NextClusterNumber
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mov ax,cx ; ax = ClusterNumber
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and ax,1 ; See if this is an odd cluster number
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je EvenFatEntry
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shr bx,4 ; NextClusterNumber = NextClusterNumber >> 4
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EvenFatEntry:
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and bx,0fffh ; Strip upper 4 bits of NextClusterNumber
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pop si ; Restore si
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dec bx ; bx = NextClusterNumber - 1
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cmp bx,cx ; See if (NextClusterNumber-1)==ClusterNumber
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jne ReadClusters
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inc bx ; bx = NextClusterNumber
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inc si ; NumberOfClusters++
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mov cx,bx ; ClusterNumber = NextClusterNumber
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jmp FatChainLoop
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ReadClusters:
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inc bx
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pop ax ; ax = StartCluster
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push bx ; StartCluster = NextClusterNumber
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mov cx,bx ; ClusterNumber = NextClusterNumber
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sub ax,2 ; ax = StartCluster - 2
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xor bh,bh
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mov bl,byte ptr [bp+SectorsPerCluster] ; bx = SectorsPerCluster
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mul bx ; ax = (StartCluster - 2) * SectorsPerCluster
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add ax, word ptr [bp] ; ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster
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push ax ; save start sector
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mov ax,si ; ax = NumberOfClusters
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mul bx ; ax = NumberOfClusters * SectorsPerCluster
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mov bx,ax ; bx = Number of Sectors
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pop ax ; ax = Start Sector
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call ReadBlocks
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mov si,1 ; NumberOfClusters = 1
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jmp FatChainLoop
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FoundLastCluster:
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pop cx
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popa
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ret
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; ****************************************************************************
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; ReadBlocks - Reads a set of blocks from a block device
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;
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; AX = Start LBA
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; BX = Number of Blocks to Read
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; ES:DI = Buffer to store sectors read from disk
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; ****************************************************************************
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; cx = Blocks
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; bx = NumberOfBlocks
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; si = StartLBA
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ReadBlocks:
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pusha
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add eax,dword ptr [bp+LBAOffsetForBootSector] ; Add LBAOffsetForBootSector to Start LBA
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add eax,dword ptr [bp+HiddenSectors] ; Add HiddenSectors to Start LBA
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mov esi,eax ; esi = Start LBA
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mov cx,bx ; cx = Number of blocks to read
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ReadCylinderLoop:
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mov bp,07bfch ; bp = 0x7bfc
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mov eax,esi ; eax = Start LBA
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xor edx,edx ; edx = 0
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movzx ebx,word ptr [bp] ; bx = MaxSector
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div ebx ; ax = StartLBA / MaxSector
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inc dx ; dx = (StartLBA % MaxSector) + 1
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mov bx,word ptr [bp] ; bx = MaxSector
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sub bx,dx ; bx = MaxSector - Sector
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inc bx ; bx = MaxSector - Sector + 1
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cmp cx,bx ; Compare (Blocks) to (MaxSector - Sector + 1)
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jg LimitTransfer
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mov bx,cx ; bx = Blocks
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LimitTransfer:
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push ax ; save ax
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mov ax,es ; ax = es
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shr ax,(BLOCK_SHIFT-4) ; ax = Number of blocks into mem system
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and ax,07fh ; ax = Number of blocks into current seg
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add ax,bx ; ax = End Block number of transfer
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cmp ax,080h ; See if it crosses a 64K boundry
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jle NotCrossing64KBoundry ; Branch if not crossing 64K boundry
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sub ax,080h ; ax = Number of blocks past 64K boundry
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sub bx,ax ; Decrease transfer size by block overage
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NotCrossing64KBoundry:
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pop ax ; restore ax
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push cx
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mov cl,dl ; cl = (StartLBA % MaxSector) + 1 = Sector
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xor dx,dx ; dx = 0
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div word ptr [bp+2] ; ax = ax / (MaxHead + 1) = Cylinder
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; dx = ax % (MaxHead + 1) = Head
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push bx ; Save number of blocks to transfer
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mov dh,dl ; dh = Head
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mov bp,07c00h ; bp = 0x7c00
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mov dl,byte ptr [bp+PhysicalDrive] ; dl = Drive Number
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mov ch,al ; ch = Cylinder
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mov al,bl ; al = Blocks
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mov ah,2 ; ah = Function 2
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mov bx,di ; es:bx = Buffer address
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int 013h
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jc DiskError
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pop bx
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pop cx
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movzx ebx,bx
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add esi,ebx ; StartLBA = StartLBA + NumberOfBlocks
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sub cx,bx ; Blocks = Blocks - NumberOfBlocks
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mov ax,es
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shl bx,(BLOCK_SHIFT-4)
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add ax,bx
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mov es,ax ; es:di = es:di + NumberOfBlocks*BLOCK_SIZE
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cmp cx,0
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jne ReadCylinderLoop
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popa
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ret
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DiskError:
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push cs
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pop ds
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lea si, [ErrorString]
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mov cx, 7
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jmp PrintStringAndHalt
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PrintStringAndHalt:
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mov ax,0b800h
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mov es,ax
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mov di,160
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rep movsw
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Halt:
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jmp Halt
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ErrorString:
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db 'S', 0ch, 'E', 0ch, 'r', 0ch, 'r', 0ch, 'o', 0ch, 'r', 0ch, '!', 0ch
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org 01fah
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LBAOffsetForBootSector:
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dd 0h
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org 01feh
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dw 0aa55h
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;******************************************************************************
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;******************************************************************************
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;******************************************************************************
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DELAY_PORT equ 0edh ; Port to use for 1uS delay
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KBD_CONTROL_PORT equ 060h ; 8042 control port
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KBD_STATUS_PORT equ 064h ; 8042 status port
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WRITE_DATA_PORT_CMD equ 0d1h ; 8042 command to write the data port
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ENABLE_A20_CMD equ 0dfh ; 8042 command to enable A20
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org 200h
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jmp start
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Em64String:
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db 'E', 0ch, 'm', 0ch, '6', 0ch, '4', 0ch, 'T', 0ch, ' ', 0ch, 'U', 0ch, 'n', 0ch, 's', 0ch, 'u', 0ch, 'p', 0ch, 'p', 0ch, 'o', 0ch, 'r', 0ch, 't', 0ch, 'e', 0ch, 'd', 0ch, '!', 0ch
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start:
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mov ax,cs
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mov ds,ax
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mov es,ax
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mov ss,ax
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mov sp,MyStack
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; mov ax,0b800h
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; mov es,ax
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; mov byte ptr es:[160],'a'
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; mov ax,cs
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; mov es,ax
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mov ebx,0
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lea edi,MemoryMap
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MemMapLoop:
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mov eax,0e820h
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mov ecx,20
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mov edx,'SMAP'
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int 15h
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jc MemMapDone
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add edi,20
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cmp ebx,0
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je MemMapDone
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jmp MemMapLoop
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MemMapDone:
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lea eax,MemoryMap
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sub edi,eax ; Get the address of the memory map
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mov dword ptr [MemoryMapSize],edi ; Save the size of the memory map
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xor ebx,ebx
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mov bx,cs ; BX=segment
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shl ebx,4 ; BX="linear" address of segment base
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lea eax,[GDT_BASE + ebx] ; EAX=PHYSICAL address of gdt
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mov dword ptr [gdtr + 2],eax ; Put address of gdt into the gdtr
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lea eax,[IDT_BASE + ebx] ; EAX=PHYSICAL address of idt
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mov dword ptr [idtr + 2],eax ; Put address of idt into the idtr
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lea edx,[MemoryMapSize + ebx] ; Physical base address of the memory map
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add ebx,01000h ; Source of EFI32
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mov dword ptr [JUMP+2],ebx
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add ebx,01000h
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mov esi,ebx ; Source of EFILDR32
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; mov ax,0b800h
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; mov es,ax
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; mov byte ptr es:[162],'b'
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; mov ax,cs
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; mov es,ax
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;
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; Enable A20 Gate
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;
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mov ax,2401h ; Enable A20 Gate
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int 15h
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jnc A20GateEnabled ; Jump if it suceeded
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;
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; If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.
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;
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 ; Jump if the 8042 timed out
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out DELAY_PORT,ax ; Delay 1 uS
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mov al,WRITE_DATA_PORT_CMD ; 8042 cmd to write output port
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out KBD_STATUS_PORT,al ; Send command to the 8042
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 ; Jump if the 8042 timed out
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mov al,ENABLE_A20_CMD ; gate address bit 20 on
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out KBD_CONTROL_PORT,al ; Send command to thre 8042
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call Empty8042InputBuffer ; Empty the Input Buffer on the 8042 controller
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mov cx,25 ; Delay 25 uS for the command to complete on the 8042
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Delay25uS:
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out DELAY_PORT,ax ; Delay 1 uS
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loop Delay25uS
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Timeout8042:
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A20GateEnabled:
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mov bx,0008h ; Flat data descriptor
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;
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; DISABLE INTERRUPTS - Entering Protected Mode
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;
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cli
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; mov ax,0b800h
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; mov es,ax
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; mov byte ptr es:[164],'c'
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; mov ax,cs
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; mov es,ax
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db 66h
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lgdt fword ptr [gdtr]
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db 66h
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lidt fword ptr [idtr]
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mov eax,cr0
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or al,1
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mov cr0,eax
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JUMP:
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; jmp far 0010:00020000
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db 066h
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db 0eah
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dd 000020000h
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dw 00010h
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Empty8042InputBuffer:
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mov cx,0
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Empty8042Loop:
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out DELAY_PORT,ax ; Delay 1us
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in al,KBD_STATUS_PORT ; Read the 8042 Status Port
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and al,02h ; Check the Input Buffer Full Flag
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loopnz Empty8042Loop ; Loop until the input buffer is empty or a timout of 65536 uS
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ret
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; data
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 02h
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gdtr dw GDT_END - GDT_BASE - 1 ; GDT limit
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dd 0 ; (GDT base gets set above)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; global descriptor table (GDT)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 02h
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public GDT_BASE
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GDT_BASE:
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; null descriptor
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NULL_SEL equ $-GDT_BASE
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dw 0 ; limit 15:0
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dw 0 ; base 15:0
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db 0 ; base 23:16
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db 0 ; type
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db 0 ; limit 19:16, flags
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db 0 ; base 31:24
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; linear data segment descriptor
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LINEAR_SEL equ $-GDT_BASE
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 092h ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; linear code segment descriptor
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LINEAR_CODE_SEL equ $-GDT_BASE
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 09Ah ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; system data segment descriptor
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SYS_DATA_SEL equ $-GDT_BASE
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 092h ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; system code segment descriptor
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SYS_CODE_SEL equ $-GDT_BASE
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 09Ah ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; spare segment descriptor
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SPARE3_SEL equ $-GDT_BASE
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dw 0 ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 0 ; present, ring 0, data, expand-up, writable
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db 0 ; page-granular, 32-bit
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db 0
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; spare segment descriptor
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SPARE4_SEL equ $-GDT_BASE
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dw 0 ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 0 ; present, ring 0, data, expand-up, writable
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db 0 ; page-granular, 32-bit
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db 0
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; spare segment descriptor
|
|
SPARE5_SEL equ $-GDT_BASE
|
|
dw 0 ; limit 0xFFFFF
|
|
dw 0 ; base 0
|
|
db 0
|
|
db 0 ; present, ring 0, data, expand-up, writable
|
|
db 0 ; page-granular, 32-bit
|
|
db 0
|
|
|
|
GDT_END:
|
|
|
|
align 02h
|
|
|
|
|
|
|
|
idtr dw IDT_END - IDT_BASE - 1 ; IDT limit
|
|
dd 0 ; (IDT base gets set above)
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
; interrupt descriptor table (IDT)
|
|
;
|
|
; Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
|
|
; mappings. This implementation only uses the system timer and all other
|
|
; IRQs will remain masked. The descriptors for vectors 33+ are provided
|
|
; for convenience.
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
;idt_tag db "IDT",0
|
|
align 02h
|
|
|
|
public IDT_BASE
|
|
IDT_BASE:
|
|
; divide by zero (INT 0)
|
|
DIV_ZERO_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; debug exception (INT 1)
|
|
DEBUG_EXCEPT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; NMI (INT 2)
|
|
NMI_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; soft breakpoint (INT 3)
|
|
BREAKPOINT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; overflow (INT 4)
|
|
OVERFLOW_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; bounds check (INT 5)
|
|
BOUNDS_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; invalid opcode (INT 6)
|
|
INVALID_OPCODE_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; device not available (INT 7)
|
|
DEV_NOT_AVAIL_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; double fault (INT 8)
|
|
DOUBLE_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; Coprocessor segment overrun - reserved (INT 9)
|
|
RSVD_INTR_SEL1 equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; invalid TSS (INT 0ah)
|
|
INVALID_TSS_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; segment not present (INT 0bh)
|
|
SEG_NOT_PRESENT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; stack fault (INT 0ch)
|
|
STACK_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; general protection (INT 0dh)
|
|
GP_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; page fault (INT 0eh)
|
|
PAGE_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; Intel reserved - do not use (INT 0fh)
|
|
RSVD_INTR_SEL2 equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; floating point error (INT 10h)
|
|
FLT_POINT_ERR_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; alignment check (INT 11h)
|
|
ALIGNMENT_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; machine check (INT 12h)
|
|
MACHINE_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; SIMD floating-point exception (INT 13h)
|
|
SIMD_EXCEPTION_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; 85 unspecified descriptors, First 12 of them are reserved, the rest are avail
|
|
db (85 * 8) dup(0)
|
|
|
|
; IRQ 0 (System timer) - (INT 68h)
|
|
IRQ0_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
IRQ1_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
IRQ2_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 3 (COM 2) - (INT 6bh)
|
|
IRQ3_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 4 (COM 1) - (INT 6ch)
|
|
IRQ4_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 5 (LPT 2) - (INT 6dh)
|
|
IRQ5_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 6 (Floppy controller) - (INT 6eh)
|
|
IRQ6_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 7 (LPT 1) - (INT 6fh)
|
|
IRQ7_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 8 (RTC Alarm) - (INT 70h)
|
|
IRQ8_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 9 - (INT 71h)
|
|
IRQ9_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 10 - (INT 72h)
|
|
IRQ10_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 11 - (INT 73h)
|
|
IRQ11_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
IRQ12_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 13 (Floating point error) - (INT 75h)
|
|
IRQ13_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 14 (Secondary IDE) - (INT 76h)
|
|
IRQ14_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
; IRQ 15 (Primary IDE) - (INT 77h)
|
|
IRQ15_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
|
|
IDT_END:
|
|
|
|
align 02h
|
|
|
|
MemoryMapSize dd 0
|
|
MemoryMap dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0
|
|
|
|
dd 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
dd 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
|
|
org 0fe0h
|
|
MyStack:
|
|
; below is the pieces of the IVT that is used to redirect INT 68h - 6fh
|
|
; back to INT 08h - 0fh when in real mode... It is 'org'ed to a
|
|
; known low address (20f00) so it can be set up by PlMapIrqToVect in
|
|
; 8259.c
|
|
|
|
int 8
|
|
iret
|
|
|
|
int 9
|
|
iret
|
|
|
|
int 10
|
|
iret
|
|
|
|
int 11
|
|
iret
|
|
|
|
int 12
|
|
iret
|
|
|
|
int 13
|
|
iret
|
|
|
|
int 14
|
|
iret
|
|
|
|
int 15
|
|
iret
|
|
|
|
|
|
org 0ffeh
|
|
BlockSignature:
|
|
dw 0aa55h
|
|
|
|
end
|