mirror of https://github.com/acidanthera/audk.git
276 lines
10 KiB
C
276 lines
10 KiB
C
/*++
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Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PciIo.h
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Abstract:
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EFI PCI I/O Protocol
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Revision History
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--*/
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#ifndef _EFI_PCI_IO_H
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#define _EFI_PCI_IO_H
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//
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// Global ID for the PCI I/O Protocol
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//
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#define EFI_PCI_IO_PROTOCOL_GUID \
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{ \
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0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a} \
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}
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EFI_FORWARD_DECLARATION (EFI_PCI_IO_PROTOCOL);
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//
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// Prototypes for the PCI I/O Protocol
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//
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typedef enum {
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EfiPciIoWidthUint8 = 0,
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EfiPciIoWidthUint16,
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EfiPciIoWidthUint32,
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EfiPciIoWidthUint64,
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EfiPciIoWidthFifoUint8,
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EfiPciIoWidthFifoUint16,
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EfiPciIoWidthFifoUint32,
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EfiPciIoWidthFifoUint64,
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EfiPciIoWidthFillUint8,
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EfiPciIoWidthFillUint16,
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EfiPciIoWidthFillUint32,
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EfiPciIoWidthFillUint64,
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EfiPciIoWidthMaximum
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} EFI_PCI_IO_PROTOCOL_WIDTH;
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//
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// Complete PCI address generater
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//
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#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff // Special BAR that passes a memory or I/O cycle through unchanged
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#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f // All the following I/O and Memory cycles
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#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 // I/O cycles 0x0000-0x00FF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 // I/O cycles 0x0000-0x03FF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 // MEM cycles 0xA0000-0xBFFFF (24 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 // I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 // I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 // Map a memory range so write are combined
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#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 // Enable the I/O decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 // Enable the Memory decode bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 // Enable the DMA bit in the PCI Config Header
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 // Map a memory range so all r/w accesses are cached
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 // Disable a memory range
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 // Clear for an add-in PCI Device
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 // Clear for a physical PCI Option ROM accessed through ROM BAR
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#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 // Clear for PCI controllers that can not genrate a DAC
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//
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// The following definition is added in EFI1.1 spec update and UEFI2.0 spec.
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//
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 // I/O cycles 0x0100-0x03FF (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
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#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
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#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
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//
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// *******************************************************
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// EFI_PCI_IO_PROTOCOL_OPERATION
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// *******************************************************
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//
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typedef enum {
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EfiPciIoOperationBusMasterRead,
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EfiPciIoOperationBusMasterWrite,
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EfiPciIoOperationBusMasterCommonBuffer,
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EfiPciIoOperationMaximum
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} EFI_PCI_IO_PROTOCOL_OPERATION;
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//
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// *******************************************************
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// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
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// *******************************************************
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//
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typedef enum {
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EfiPciIoAttributeOperationGet,
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EfiPciIoAttributeOperationSet,
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EfiPciIoAttributeOperationEnable,
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EfiPciIoAttributeOperationDisable,
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EfiPciIoAttributeOperationSupported,
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EfiPciIoAttributeOperationMaximum
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} EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINT64 Mask,
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IN UINT64 Value,
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IN UINT64 Delay,
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OUT UINT64 *Result
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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typedef struct {
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EFI_PCI_IO_PROTOCOL_IO_MEM Read;
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EFI_PCI_IO_PROTOCOL_IO_MEM Write;
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} EFI_PCI_IO_PROTOCOL_ACCESS;
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT32 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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typedef struct {
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EFI_PCI_IO_PROTOCOL_CONFIG Read;
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EFI_PCI_IO_PROTOCOL_CONFIG Write;
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} EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 DestBarIndex,
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IN UINT64 DestOffset,
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IN UINT8 SrcBarIndex,
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IN UINT64 SrcOffset,
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IN UINTN Count
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_MAP) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT EFI_PHYSICAL_ADDRESS * DeviceAddress,
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OUT VOID **Mapping
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN VOID *Mapping
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_ALLOCATE_TYPE Type,
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IN EFI_MEMORY_TYPE MemoryType,
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IN UINTN Pages,
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OUT VOID **HostAddress,
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IN UINT64 Attributes
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN UINTN Pages,
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IN VOID *HostAddress
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH) (
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IN EFI_PCI_IO_PROTOCOL * This
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION) (
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IN EFI_PCI_IO_PROTOCOL * This,
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OUT UINTN *SegmentNumber,
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OUT UINTN *BusNumber,
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OUT UINTN *DeviceNumber,
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OUT UINTN *FunctionNumber
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
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IN UINT64 Attributes,
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OUT UINT64 *Result OPTIONAL
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN UINT8 BarIndex,
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OUT UINT64 *Supports, OPTIONAL
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OUT VOID **Resources OPTIONAL
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);
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES) (
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IN EFI_PCI_IO_PROTOCOL * This,
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IN UINT64 Attributes,
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IN UINT8 BarIndex,
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IN OUT UINT64 *Offset,
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IN OUT UINT64 *Length
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);
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//
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// Interface structure for the PCI I/O Protocol
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//
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struct _EFI_PCI_IO_PROTOCOL {
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
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EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
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EFI_PCI_IO_PROTOCOL_ACCESS Mem;
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EFI_PCI_IO_PROTOCOL_ACCESS Io;
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EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
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EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
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EFI_PCI_IO_PROTOCOL_MAP Map;
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EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
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EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
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EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
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EFI_PCI_IO_PROTOCOL_FLUSH Flush;
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EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
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EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
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EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
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EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
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UINT64 RomSize;
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VOID *RomImage;
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};
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extern EFI_GUID gEfiPciIoProtocolGuid;
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#endif
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