mirror of https://github.com/acidanthera/audk.git
339 lines
17 KiB
Plaintext
339 lines
17 KiB
Plaintext
## @file UefiCpuPkg.dec
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# This Package provides UEFI compatible CPU modules and libraries.
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#
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# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = UefiCpuPkg
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PACKAGE_UNI_FILE = UefiCpuPkg.uni
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PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
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PACKAGE_VERSION = 0.90
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Defines some routines that are generic for IA32 family CPU
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## to be UEFI specification compliant.
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##
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UefiCpuLib|Include/Library/UefiCpuLib.h
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## @libraryclass Defines some routines that are used to register/manage/program
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## CPU features.
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##
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RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
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[LibraryClasses.IA32, LibraryClasses.X64]
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## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
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##
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MtrrLib|Include/Library/MtrrLib.h
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## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
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##
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LocalApicLib|Include/Library/LocalApicLib.h
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## @libraryclass Provides platform specific initialization functions in the SEC phase.
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##
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PlatformSecLib|Include/Library/PlatformSecLib.h
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## @libraryclass Public include file for the SMM CPU Platform Hook Library.
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##
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SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
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## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.
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##
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SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
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## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.
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##
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MpInitLib|Include/Library/MpInitLib.h
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[Guids]
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gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
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gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
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## Include/Guid/CpuFeaturesSetDone.h
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gEdkiiCpuFeaturesSetDoneGuid = { 0xa82485ce, 0xad6b, 0x4101, { 0x99, 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }}
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## Include/Guid/CpuFeaturesInitDone.h
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gEdkiiCpuFeaturesInitDoneGuid = { 0xc77c3a41, 0x61ab, 0x4143, { 0x98, 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }}
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[Protocols]
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## Include/Protocol/SmmCpuService.h
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gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
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## Include/Protocol/SmMonitorInit.h
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gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
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#
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# [Error.gUefiCpuPkgTokenSpaceGuid]
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# 0x80000001 | Invalid value provided.
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#
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[Ppis]
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gEdkiiPeiMpServices2PpiGuid = { 0x5cb9cb3d, 0x31a4, 0x480c, { 0x94, 0x98, 0x29, 0xd2, 0x69, 0xba, 0xcf, 0xba}}
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[PcdsFeatureFlag]
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## Indicates if SMM Profile will be enabled.
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# If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
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# It could not be enabled at the same time with SMM static page table feature (PcdCpuSmmStaticPageTable).
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# This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
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# TRUE - SMM Profile will be enabled.<BR>
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# FALSE - SMM Profile will be disabled.<BR>
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# @Prompt Enable SMM Profile.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
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## Indicates if the SMM profile log buffer is a ring buffer.
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# If disabled, no additional log can be done when the buffer is full.<BR><BR>
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# TRUE - the SMM profile log buffer is a ring buffer.<BR>
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# FALSE - the SMM profile log buffer is a normal buffer.<BR>
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# @Prompt The SMM profile log buffer is a ring buffer.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
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## Indicates if SMM Startup AP in a blocking fashion.
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# TRUE - SMM Startup AP in a blocking fashion.<BR>
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# FALSE - SMM Startup AP in a non-blocking fashion.<BR>
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# @Prompt SMM Startup AP in a blocking fashion.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
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## Indicates if SMM Stack Guard will be enabled.
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# If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
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# TRUE - SMM Stack Guard will be enabled.<BR>
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# FALSE - SMM Stack Guard will be disabled.<BR>
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# @Prompt Enable SMM Stack Guard.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
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## Indicates if BSP election in SMM will be enabled.
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# If enabled, a BSP will be dynamically elected among all processors in each SMI.
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# Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
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# TRUE - BSP election in SMM will be enabled.<BR>
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# FALSE - BSP election in SMM will be disabled.<BR>
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# @Prompt Enable BSP election in SMM.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
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## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
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# TRUE - SMM CPU hot-plug will be enabled.<BR>
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# FALSE - SMM CPU hot-plug will be disabled.<BR>
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# @Prompt SMM CPU hot-plug.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
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## Indicates if SMM Debug will be enabled.
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# If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
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# TRUE - SMM Debug will be enabled.<BR>
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# FALSE - SMM Debug will be disabled.<BR>
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# @Prompt Enable SMM Debug.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
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## Indicates if lock SMM Feature Control MSR.<BR><BR>
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# TRUE - SMM Feature Control MSR will be locked.<BR>
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# FALSE - SMM Feature Control MSR will not be locked.<BR>
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# @Prompt Lock SMM Feature Control MSR.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
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[PcdsFixedAtBuild]
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## List of exception vectors which need switching stack.
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# This PCD will only take into effect if PcdCpuStackGuard is enabled.
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# By default exception #DD(8), #PF(14) are supported.
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# @Prompt Specify exception vectors which need switching stack.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VOID*|0x30002000
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## Size of good stack for an exception.
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# This PCD will only take into effect if PcdCpuStackGuard is enabled.
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# @Prompt Specify size of good stack of exception which need switching stack.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
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# @Prompt Configure base address of CPU Local APIC
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# @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
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## Specifies delay value in microseconds after sending out an INIT IPI.
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# @Prompt Configure delay value after send an INIT IPI
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gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
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## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
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## aligns the address on a 4-KByte boundary.
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# @Prompt Configure stack size for Application Processor (AP)
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
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## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
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# @Prompt Stack size in the temporary RAM.
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gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
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## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
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# @Prompt SMM profile data buffer size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
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## Specifies stack size in bytes for each processor in SMM.
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# @Prompt Processor stack size in SMM.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
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## Specifies shadow stack size in bytes for each processor in SMM.
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# @Prompt Processor shadow stack size in SMM.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmShadowStackSize|0x2000|UINT32|0x3213210E
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## Indicates if SMM Code Access Check is enabled.
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# If enabled, the SMM handler cannot execute the code outside SMM regions.
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# This PCD is suggested to TRUE in production image.<BR><BR>
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# TRUE - SMM Code Access Check will be enabled.<BR>
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# FALSE - SMM Code Access Check will be disabled.<BR>
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# @Prompt SMM Code Access Check.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
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## Specifies the number of variable MTRRs reserved for OS use. The default number of
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# MTRRs reserved for OS use is 2.
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# @Prompt Number of reserved variable MTRRs.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
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## Specifies buffer size in bytes for STM exception stack. The value should be a multiple of 4KB.
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# @Prompt STM exception stack size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize|0x1000|UINT32|0x32132111
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## Specifies buffer size in bytes of MSEG. The value should be a multiple of 4KB.
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# @Prompt MSEG size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize|0x200000|UINT32|0x32132112
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## Specifies the supported CPU features bit in array.
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# @Prompt Supported CPU features.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x00000016
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## Specifies if CPU features will be initialized after SMM relocation.
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# @Prompt If CPU features will be initialized after SMM relocation.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitAfterSmmRelocation|FALSE|BOOLEAN|0x0000001C
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## Specifies if CPU features will be initialized during S3 resume.
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# @Prompt If CPU features will be initialized during S3 resume.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D
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## Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Frequency.
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# TSC Frequency = ECX (core crystal clock frequency) * EBX/EAX.
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# Intel Xeon Processor Scalable Family with CPUID signature 06_55H = 25000000 (25MHz)
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# 6th and 7th generation Intel Core processors and Intel Xeon W Processor Family = 24000000 (24MHz)
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# Intel Atom processors based on Goldmont Microarchitecture with CPUID signature 06_5CH = 19200000 (19.2MHz)
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# @Prompt This PCD is the nominal frequency of the core crystal clock in Hz as is CPUID Leaf 0x15:ECX
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gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|24000000|UINT64|0x32132113
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[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
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## Specifies max supported number of Logical Processors.
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# @Prompt Configure max supported number of Logical Processors
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
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## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
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# @Prompt Timeout for the BSP to detect all APs for the first time.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
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## Specifies the base address of the first microcode Patch in the microcode Region.
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# @Prompt Microcode Region base address.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
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## Specifies the size of the microcode Region.
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# @Prompt Microcode Region size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
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## Specifies the AP wait loop state during POST phase.
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# The value is defined as below.<BR><BR>
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# 1: Place AP in the Hlt-Loop state.<BR>
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# 2: Place AP in the Mwait-Loop state.<BR>
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# 3: Place AP in the Run-Loop state.<BR>
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# @Prompt The AP wait loop state.
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# @ValidRange 0x80000001 | 1 - 3
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
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## Specifies the AP target C-state for Mwait during POST phase.
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# The default value 0 means C1 state.
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# The value is defined as below.<BR><BR>
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# @Prompt The specified AP target C-state for Mwait.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
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## Indicates if SMM uses static page table.
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# If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.
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# This flag only impacts X64 build, because SMM always builds static page table for IA32.
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# It could not be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
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# It could not be enabled also at the same time with heap guard feature for SMM
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# (PcdHeapGuardPropertyMask in MdeModulePkg).<BR><BR>
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# TRUE - SMM uses static page table for all memory.<BR>
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# FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.<BR>
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# @Prompt Use static page table for all memory in SMM.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D
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## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
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# @Prompt AP synchronization timeout value in SMM.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
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## Indicates the CPU synchronization method used when processing an SMI.
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# 0x00 - Traditional CPU synchronization method.<BR>
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# 0x01 - Relaxed CPU synchronization method.<BR>
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# @Prompt SMM CPU Synchronization Method.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
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## Specifies the On-demand clock modulation duty cycle when ACPI feature is enabled.
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# @Prompt The encoded values for target duty cycle modulation.
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# @ValidRange 0x80000001 | 0 - 15
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gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x0000001A
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## Indicates if the current boot is a power-on reset.<BR><BR>
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# TRUE - Current boot is a power-on reset.<BR>
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# FALSE - Current boot is not a power-on reset.<BR>
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# @Prompt Current boot is a power-on reset.
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gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
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[PcdsDynamic, PcdsDynamicEx]
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## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
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# @Prompt The pointer to a CPU S3 data buffer.
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# @ValidList 0x80000001 | 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
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## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
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# @Prompt The pointer to CPU Hot Plug Data.
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# @ValidList 0x80000001 | 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
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## Indicates processor feature capabilities, each bit corresponding to a specific feature.
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# @Prompt Processor feature capabilities.
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# @ValidList 0x80000001 | 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000018
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## As input, specifies user's desired settings for enabling/disabling processor features.
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## As output, specifies actual settings for processor features, each bit corresponding to a specific feature.
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# @Prompt As input, specifies user's desired processor feature settings. As output, specifies actual processor feature settings.
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# @ValidList 0x80000001 | 0
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gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000019
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## Contains the size of memory required when CPU processor trace is enabled.<BR><BR>
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# Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
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# This PCD is ignored if CPU processor trace is disabled.<BR><BR>
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# Default value is 0x00 which means 4KB of memory is allocated if CPU processor trace is enabled.<BR>
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# 0x0 - 4K.<BR>
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# 0x1 - 8K.<BR>
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# 0x2 - 16K.<BR>
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# 0x3 - 32K.<BR>
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# 0x4 - 64K.<BR>
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# 0x5 - 128K.<BR>
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# 0x6 - 256K.<BR>
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# 0x7 - 512K.<BR>
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# 0x8 - 1M.<BR>
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# 0x9 - 2M.<BR>
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# 0xA - 4M.<BR>
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# 0xB - 8M.<BR>
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# 0xC - 16M.<BR>
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# 0xD - 32M.<BR>
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# 0xE - 64M.<BR>
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# 0xF - 128M.<BR>
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# @Prompt The memory size used for processor trace if processor trace is enabled.
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# @ValidRange 0x80000001 | 0 - 0xF
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize|0x0|UINT32|0x60000012
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## Contains the processor trace output scheme when CPU processor trace is enabled.<BR><BR>
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# Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>
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# This PCD is ignored if CPU processor trace is disabled.<BR><BR>
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# Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>
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# 0 - Single Range output scheme.<BR>
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# 1 - ToPA(Table of physical address) scheme.<BR>
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# @Prompt The processor trace output scheme used when processor trace is enabled.
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# @ValidRange 0x80000001 | 0 - 1
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x60000015
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[UserExtensions.TianoCore."ExtraFiles"]
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UefiCpuPkgExtra.uni
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