mirror of https://github.com/acidanthera/audk.git
421 lines
12 KiB
C
421 lines
12 KiB
C
/** @file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <IndustryStandard/Vtd.h>
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#include <Ppi/VtdInfo.h>
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#include "IntelVTdPmrPei.h"
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/**
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Get protected low memory alignment.
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@param HostAddressWidth The host address width.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@return protected low memory alignment.
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**/
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UINT32
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GetPlmrAlignment (
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IN UINT8 HostAddressWidth,
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Data32;
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG, 0xFFFFFFFF);
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Data32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG);
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Data32 = ~Data32 + 1;
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return Data32;
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}
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/**
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Get protected high memory alignment.
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@param HostAddressWidth The host address width.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@return protected high memory alignment.
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**/
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UINT64
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GetPhmrAlignment (
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IN UINT8 HostAddressWidth,
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT64 Data64;
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG, 0xFFFFFFFFFFFFFFFF);
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Data64 = MmioRead64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG);
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Data64 = ~Data64 + 1;
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Data64 = Data64 & (LShiftU64 (1, HostAddressWidth) - 1);
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return Data64;
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}
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/**
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Get protected low memory alignment.
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@param VTdInfo The VTd engine context information.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected low memory alignment.
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**/
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UINT32
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GetLowMemoryAlignment (
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IN VTD_INFO *VTdInfo,
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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UINT32 Alignment;
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UINT32 FinalAlignment;
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FinalAlignment = 0;
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for (Index = 0; Index < VTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Alignment = GetPlmrAlignment (VTdInfo->HostAddressWidth, (UINTN)VTdInfo->VTdEngineAddress[Index]);
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if (FinalAlignment < Alignment) {
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FinalAlignment = Alignment;
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}
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}
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return FinalAlignment;
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}
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/**
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Get protected high memory alignment.
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@param VTdInfo The VTd engine context information.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected high memory alignment.
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**/
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UINT64
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GetHighMemoryAlignment (
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IN VTD_INFO *VTdInfo,
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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UINT64 Alignment;
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UINT64 FinalAlignment;
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FinalAlignment = 0;
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for (Index = 0; Index < VTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Alignment = GetPhmrAlignment (VTdInfo->HostAddressWidth, (UINTN)VTdInfo->VTdEngineAddress[Index]);
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if (FinalAlignment < Alignment) {
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FinalAlignment = Alignment;
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}
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}
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return FinalAlignment;
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}
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/**
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Enable PMR in the VTd engine.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@retval EFI_SUCCESS The PMR is enabled.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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EnablePmr (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Reg32;
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VTD_CAP_REG CapReg;
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DEBUG ((DEBUG_INFO, "EnablePmr - %x\n", VtdUnitBaseAddress));
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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return EFI_UNSUPPORTED;
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}
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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if (Reg32 == 0xFFFFFFFF) {
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DEBUG ((DEBUG_ERROR, "R_PMEN_ENABLE_REG - 0x%x\n", Reg32));
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ASSERT(FALSE);
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}
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if ((Reg32 & BIT0) == 0) {
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG, BIT31);
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do {
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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} while((Reg32 & BIT0) == 0);
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}
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DEBUG ((DEBUG_INFO, "EnablePmr - Done\n"));
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return EFI_SUCCESS;
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}
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/**
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Disable PMR in the VTd engine.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@retval EFI_SUCCESS The PMR is disabled.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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DisablePmr (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Reg32;
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VTD_CAP_REG CapReg;
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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return EFI_UNSUPPORTED;
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}
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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if (Reg32 == 0xFFFFFFFF) {
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DEBUG ((DEBUG_ERROR, "R_PMEN_ENABLE_REG - 0x%x\n", Reg32));
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ASSERT(FALSE);
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}
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if ((Reg32 & BIT0) != 0) {
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG, 0x0);
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do {
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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} while((Reg32 & BIT0) != 0);
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}
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return EFI_SUCCESS;
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}
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/**
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Set PMR region in the VTd engine.
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@param HostAddressWidth The host address width.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@param LowMemoryBase The protected low memory region base.
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@param LowMemoryLength The protected low memory region length.
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@param HighMemoryBase The protected high memory region base.
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@param HighMemoryLength The protected high memory region length.
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@retval EFI_SUCCESS The PMR is set to protected region.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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SetPmrRegion (
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IN UINT8 HostAddressWidth,
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IN UINTN VtdUnitBaseAddress,
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IN UINT32 LowMemoryBase,
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IN UINT32 LowMemoryLength,
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IN UINT64 HighMemoryBase,
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IN UINT64 HighMemoryLength
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)
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{
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VTD_CAP_REG CapReg;
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UINT32 PlmrAlignment;
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UINT64 PhmrAlignment;
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DEBUG ((DEBUG_INFO, "VtdUnitBaseAddress - 0x%x\n", VtdUnitBaseAddress));
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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DEBUG ((DEBUG_ERROR, "PLMR/PHMR unsupported\n"));
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return EFI_UNSUPPORTED;
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}
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PlmrAlignment = GetPlmrAlignment (HostAddressWidth, VtdUnitBaseAddress);
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DEBUG ((DEBUG_INFO, "PlmrAlignment - 0x%x\n", PlmrAlignment));
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PhmrAlignment = GetPhmrAlignment (HostAddressWidth, VtdUnitBaseAddress);
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DEBUG ((DEBUG_INFO, "PhmrAlignment - 0x%lx\n", PhmrAlignment));
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if ((LowMemoryBase != ALIGN_VALUE(LowMemoryBase, PlmrAlignment)) ||
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(LowMemoryLength != ALIGN_VALUE(LowMemoryLength, PlmrAlignment)) ||
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(HighMemoryBase != ALIGN_VALUE(HighMemoryBase, PhmrAlignment)) ||
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(HighMemoryLength != ALIGN_VALUE(HighMemoryLength, PhmrAlignment))) {
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DEBUG ((DEBUG_ERROR, "PLMR/PHMR alignment issue\n"));
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return EFI_UNSUPPORTED;
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}
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if (LowMemoryBase == 0 && LowMemoryLength == 0) {
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LowMemoryBase = 0xFFFFFFFF;
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}
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if (HighMemoryBase == 0 && HighMemoryLength == 0) {
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HighMemoryBase = 0xFFFFFFFFFFFFFFFF;
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}
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG, LowMemoryBase);
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_LIMITE_REG, LowMemoryBase + LowMemoryLength - 1);
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DEBUG ((DEBUG_INFO, "PLMR set done\n"));
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG, HighMemoryBase);
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_LIMITE_REG, HighMemoryBase + HighMemoryLength - 1);
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DEBUG ((DEBUG_INFO, "PHMR set done\n"));
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return EFI_SUCCESS;
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}
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/**
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Set DMA protected region.
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@param VTdInfo The VTd engine context information.
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@param EngineMask The mask of the VTd engine to be accessed.
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@param LowMemoryBase The protected low memory region base.
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@param LowMemoryLength The protected low memory region length.
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@param HighMemoryBase The protected high memory region base.
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@param HighMemoryLength The protected high memory region length.
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@retval EFI_SUCCESS The DMA protection is set.
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@retval EFI_UNSUPPORTED The DMA protection is not set.
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**/
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EFI_STATUS
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SetDmaProtectedRange (
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IN VTD_INFO *VTdInfo,
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IN UINT64 EngineMask,
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IN UINT32 LowMemoryBase,
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IN UINT32 LowMemoryLength,
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IN UINT64 HighMemoryBase,
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IN UINT64 HighMemoryLength
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)
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{
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UINTN Index;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SetDmaProtectedRange(0x%lx) - [0x%x, 0x%x] [0x%lx, 0x%lx]\n", EngineMask, LowMemoryBase, LowMemoryLength, HighMemoryBase, HighMemoryLength));
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for (Index = 0; Index < VTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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DisablePmr ((UINTN)VTdInfo->VTdEngineAddress[Index]);
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Status = SetPmrRegion (
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VTdInfo->HostAddressWidth,
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(UINTN)VTdInfo->VTdEngineAddress[Index],
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LowMemoryBase,
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LowMemoryLength,
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HighMemoryBase,
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HighMemoryLength
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);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Status = EnablePmr ((UINTN)VTdInfo->VTdEngineAddress[Index]);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Diable DMA protection.
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@param VTdInfo The VTd engine context information.
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@param EngineMask The mask of the VTd engine to be accessed.
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@retval EFI_SUCCESS DMA protection is disabled.
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**/
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EFI_STATUS
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DisableDmaProtection (
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IN VTD_INFO *VTdInfo,
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "DisableDmaProtection - 0x%lx\n", EngineMask));
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for (Index = 0; Index < VTdInfo->VTdEngineCount; Index++) {
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DEBUG ((DEBUG_INFO, "Disabling...%d\n", Index));
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Status = DisablePmr ((UINTN)VTdInfo->VTdEngineAddress[Index]);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Return if the PMR is enabled.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@retval TRUE PMR is enabled.
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@retval FALSE PMR is disabled or unsupported.
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**/
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BOOLEAN
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IsPmrEnabled (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Reg32;
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VTD_CAP_REG CapReg;
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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return FALSE;
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}
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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if ((Reg32 & BIT0) == 0) {
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return FALSE;
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}
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return TRUE;
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}
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/**
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Return the mask of the VTd engine which is enabled.
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@param VTdInfo The VTd engine context information.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return the mask of the VTd engine which is enabled.
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**/
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UINT64
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GetDmaProtectionEnabledEngineMask (
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IN VTD_INFO *VTdInfo,
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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BOOLEAN Result;
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UINT64 EnabledEngineMask;
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DEBUG ((DEBUG_INFO, "GetDmaProtectionEnabledEngineMask - 0x%lx\n", EngineMask));
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EnabledEngineMask = 0;
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for (Index = 0; Index < VTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Result = IsPmrEnabled ((UINTN)VTdInfo->VTdEngineAddress[Index]);
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if (Result) {
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EnabledEngineMask |= LShiftU64(1, Index);
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}
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}
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DEBUG ((DEBUG_INFO, "EnabledEngineMask - 0x%lx\n", EnabledEngineMask));
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return EnabledEngineMask;
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}
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