mirror of https://github.com/acidanthera/audk.git
422 lines
11 KiB
C
422 lines
11 KiB
C
/** @file
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ARM Mali DP 500/550/650 display controller driver
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Copyright (c) 2017-2018, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/LcdHwLib.h>
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#include <Library/LcdPlatformLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include "ArmMaliDp.h"
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// CORE_ID of the MALI DP
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STATIC UINT32 mDpDeviceId;
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/** Disable the graphics layer
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This is done by clearing the EN bit of the LG_CONTROL register.
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**/
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STATIC
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VOID
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LayerGraphicsDisable (
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VOID
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)
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{
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MmioAnd32 (DP_BASE + DP_DE_LG_CONTROL, ~DP_DE_LG_ENABLE);
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}
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/** Enable the graphics layer
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This is done by setting the EN bit of the LG_CONTROL register.
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**/
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STATIC
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VOID
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LayerGraphicsEnable (
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VOID
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)
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{
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MmioOr32 (DP_BASE + DP_DE_LG_CONTROL, DP_DE_LG_ENABLE);
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}
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/** Set the frame address of the graphics layer.
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@param[in] FrameBaseAddress Address of the data buffer to be used as
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a framebuffer.
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**/
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STATIC
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VOID
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LayerGraphicsSetFrame (
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IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress
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)
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{
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// Disable the graphics layer.
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LayerGraphicsDisable ();
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// Set up memory address of the data buffer for graphics layer.
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// write lower bits of the address.
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MmioWrite32 (
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DP_BASE + DP_DE_LG_PTR_LOW,
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DP_DE_LG_PTR_LOW_MASK & FrameBaseAddress
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);
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// Write higher bits of the address.
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MmioWrite32 (
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DP_BASE + DP_DE_LG_PTR_HIGH,
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(UINT32)(FrameBaseAddress >> DP_DE_LG_PTR_HIGH_SHIFT)
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);
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// Enable the graphics layer.
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LayerGraphicsEnable ();
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}
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/** Configures various graphics layer characteristics.
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@param[in] UefiGfxPixelFormat This must be either
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PixelBlueGreenRedReserved8BitPerColor
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OR
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PixelRedGreenBlueReserved8BitPerColor
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@param[in] HRes Horizontal resolution of the graphics layer.
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@param[in] VRes Vertical resolution of the graphics layer.
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**/
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STATIC
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VOID
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LayerGraphicsConfig (
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IN CONST EFI_GRAPHICS_PIXEL_FORMAT UefiGfxPixelFormat,
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IN CONST UINT32 HRes,
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IN CONST UINT32 VRes
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)
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{
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UINT32 PixelFormat;
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// Disable the graphics layer before configuring any settings.
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LayerGraphicsDisable ();
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// Setup graphics layer size.
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MmioWrite32 (DP_BASE + DP_DE_LG_IN_SIZE, FRAME_IN_SIZE (HRes, VRes));
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// Setup graphics layer composition size.
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MmioWrite32 (DP_BASE + DP_DE_LG_CMP_SIZE, FRAME_CMP_SIZE (HRes, VRes));
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// Setup memory stride (total visible pixels on a line * 4).
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MmioWrite32 (DP_BASE + DP_DE_LG_H_STRIDE, (HRes * sizeof (UINT32)));
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// Set the format.
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// In PixelBlueGreenRedReserved8BitPerColor format, byte 0 represents blue,
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// byte 1 represents green, byte 2 represents red, and byte 3 is reserved
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// which is equivalent to XRGB format of the DP500/DP550/DP650. Whereas
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// PixelRedGreenBlueReserved8BitPerColor is equivalent to XBGR of the
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// DP500/DP550/DP650.
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if (UefiGfxPixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
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PixelFormat = (mDpDeviceId == MALIDP_500) ? DP_PIXEL_FORMAT_DP500_XRGB_8888
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: DP_PIXEL_FORMAT_XRGB_8888;
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} else {
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PixelFormat = (mDpDeviceId == MALIDP_500) ? DP_PIXEL_FORMAT_DP500_XBGR_8888
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: DP_PIXEL_FORMAT_XBGR_8888;
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}
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MmioWrite32 (DP_BASE + DP_DE_LG_FORMAT, PixelFormat);
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// Enable graphics layer.
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LayerGraphicsEnable ();
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}
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/** Configure timing information of the display.
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@param[in] Horizontal Pointer to horizontal timing parameters.
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(Resolution, Sync, Back porch, Front porch)
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@param[in] Vertical Pointer to vertical timing parameters.
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(Resolution, Sync, Back porch, Front porch)
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**/
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STATIC
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VOID
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SetDisplayEngineTiming (
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IN CONST SCAN_TIMINGS *CONST Horizontal,
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IN CONST SCAN_TIMINGS *CONST Vertical
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)
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{
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UINTN RegHIntervals;
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UINTN RegVIntervals;
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UINTN RegSyncControl;
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UINTN RegHVActiveSize;
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if (mDpDeviceId == MALIDP_500) {
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// MALI DP500 timing registers.
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RegHIntervals = DP_BASE + DP_DE_DP500_H_INTERVALS;
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RegVIntervals = DP_BASE + DP_DE_DP500_V_INTERVALS;
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RegSyncControl = DP_BASE + DP_DE_DP500_SYNC_CONTROL;
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RegHVActiveSize = DP_BASE + DP_DE_DP500_HV_ACTIVESIZE;
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} else {
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// MALI DP550/DP650 timing registers.
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RegHIntervals = DP_BASE + DP_DE_H_INTERVALS;
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RegVIntervals = DP_BASE + DP_DE_V_INTERVALS;
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RegSyncControl = DP_BASE + DP_DE_SYNC_CONTROL;
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RegHVActiveSize = DP_BASE + DP_DE_HV_ACTIVESIZE;
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}
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// Horizontal back porch and front porch.
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MmioWrite32 (
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RegHIntervals,
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H_INTERVALS (Horizontal->FrontPorch, Horizontal->BackPorch)
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);
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// Vertical back porch and front porch.
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MmioWrite32 (
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RegVIntervals,
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V_INTERVALS (Vertical->FrontPorch, Vertical->BackPorch)
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);
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// Sync control, Horizontal and Vertical sync.
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MmioWrite32 (
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RegSyncControl,
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SYNC_WIDTH (Horizontal->Sync, Vertical->Sync)
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);
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// Set up Horizontal and Vertical area size.
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MmioWrite32 (
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RegHVActiveSize,
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HV_ACTIVE (Horizontal->Resolution, Vertical->Resolution)
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);
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}
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/** Return CORE_ID of the ARM Mali DP.
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@retval 0xFFF No Mali DP found.
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@retval 0x500 Mali DP core id for DP500.
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@retval 0x550 Mali DP core id for DP550.
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@retval 0x650 Mali DP core id for DP650.
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**/
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STATIC
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UINT32
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ArmMaliDpGetCoreId (
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)
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{
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UINT32 DpCoreId;
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// First check for DP500 as register offset for DP550/DP650 CORE_ID
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// is beyond 3K/4K register space of the DP500.
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DpCoreId = MmioRead32 (DP_BASE + DP_DE_DP500_CORE_ID);
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DpCoreId >>= DP_DE_DP500_CORE_ID_SHIFT;
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if (DpCoreId == MALIDP_500) {
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return DpCoreId;
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}
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// Check for DP550 or DP650.
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DpCoreId = MmioRead32 (DP_BASE + DP_DC_CORE_ID);
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DpCoreId >>= DP_DC_CORE_ID_SHIFT;
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if ((DpCoreId == MALIDP_550) || (DpCoreId == MALIDP_650)) {
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return DpCoreId;
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}
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return MALIDP_NOT_PRESENT;
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}
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/** Check for presence of MALI.
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This function returns success if the platform implements
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DP500/DP550/DP650 ARM Mali display processor.
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@retval EFI_SUCCESS DP500/DP550/DP650 display processor found
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on the platform.
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@retval EFI_NOT_FOUND DP500/DP550/DP650 display processor not found
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on the platform.
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**/
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EFI_STATUS
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LcdIdentify (
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VOID
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)
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{
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DEBUG ((
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DEBUG_WARN,
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"Probing ARM Mali DP500/DP550/DP650 at base address 0x%p\n",
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DP_BASE
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));
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if (mDpDeviceId == 0) {
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mDpDeviceId = ArmMaliDpGetCoreId ();
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}
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if (mDpDeviceId == MALIDP_NOT_PRESENT) {
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DEBUG ((DEBUG_WARN, "ARM Mali DP not found...\n"));
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return EFI_NOT_FOUND;
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}
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DEBUG ((DEBUG_WARN, "Found ARM Mali DP %x\n", mDpDeviceId));
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return EFI_SUCCESS;
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}
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/** Initialize platform display.
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@param[in] FrameBaseAddress Address of the frame buffer.
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@retval EFI_SUCCESS Display initialization successful.
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@retval !(EFI_SUCCESS) Display initialization failure.
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**/
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EFI_STATUS
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LcdInitialize (
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IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress
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)
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{
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DEBUG ((DEBUG_WARN, "Framebuffer base address = %p\n", FrameBaseAddress));
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if (mDpDeviceId == 0) {
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mDpDeviceId = ArmMaliDpGetCoreId ();
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}
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if (mDpDeviceId == MALIDP_NOT_PRESENT) {
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DEBUG ((
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DEBUG_ERROR,
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"ARM Mali DP initialization failed,"
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"no ARM Mali DP present\n"
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));
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return EFI_NOT_FOUND;
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}
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// We are using graphics layer of the Mali DP as a main framebuffer.
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LayerGraphicsSetFrame (FrameBaseAddress);
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return EFI_SUCCESS;
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}
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/** Set ARM Mali DP in cofiguration mode.
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The ARM Mali DP must be in the configuration mode for
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configuration of the H_INTERVALS, V_INTERVALS, SYNC_CONTROL
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and HV_ACTIVESIZE.
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**/
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STATIC
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VOID
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SetConfigurationMode (
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VOID
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)
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{
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// Request configuration Mode.
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if (mDpDeviceId == MALIDP_500) {
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MmioOr32 (DP_BASE + DP_DE_DP500_CONTROL, DP_DE_DP500_CONTROL_CONFIG_REQ);
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} else {
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MmioOr32 (DP_BASE + DP_DC_CONTROL, DP_DC_CONTROL_CM_ACTIVE);
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}
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}
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/** Set ARM Mali DP in normal mode.
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Normal mode is the main operating mode of the display processor
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in which display layer data is fetched from framebuffer and
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displayed.
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**/
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STATIC
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VOID
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SetNormalMode (
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VOID
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)
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{
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// Disable configuration Mode.
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if (mDpDeviceId == MALIDP_500) {
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MmioAnd32 (DP_BASE + DP_DE_DP500_CONTROL, ~DP_DE_DP500_CONTROL_CONFIG_REQ);
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} else {
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MmioAnd32 (DP_BASE + DP_DC_CONTROL, ~DP_DC_CONTROL_CM_ACTIVE);
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}
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}
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/** Set the global configuration valid flag.
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Any new configuration parameters written to the display engine are not
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activated until the global configuration valid flag is set in the
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CONFIG_VALID register.
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**/
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STATIC
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VOID
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SetConfigValid (
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VOID
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)
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{
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if (mDpDeviceId == MALIDP_500) {
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MmioOr32 (DP_BASE + DP_DP500_CONFIG_VALID, DP_DC_CONFIG_VALID);
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} else {
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MmioOr32 (DP_BASE + DP_DC_CONFIG_VALID, DP_DC_CONFIG_VALID);
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}
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}
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/** Set requested mode of the display.
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@param[in] ModeNumber Display mode number.
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@retval EFI_SUCCESS Display mode set successful.
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@retval EFI_DEVICE_ERROR Display mode not found/supported.
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**/
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EFI_STATUS
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LcdSetMode (
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IN CONST UINT32 ModeNumber
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)
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{
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EFI_STATUS Status;
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SCAN_TIMINGS *Horizontal;
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SCAN_TIMINGS *Vertical;
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EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;
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// Get the display mode timings and other relevant information.
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Status = LcdPlatformGetTimings (
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ModeNumber,
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&Horizontal,
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&Vertical
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);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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ASSERT (Horizontal != NULL);
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ASSERT (Vertical != NULL);
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// Get the pixel format information.
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Status = LcdPlatformQueryMode (ModeNumber, &ModeInfo);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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// Request configuration mode.
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SetConfigurationMode ();
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// Configure the graphics layer.
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LayerGraphicsConfig (
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ModeInfo.PixelFormat,
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Horizontal->Resolution,
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Vertical->Resolution
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);
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// Set the display engine timings.
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SetDisplayEngineTiming (Horizontal, Vertical);
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// After configuration, set Mali DP in normal mode.
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SetNormalMode ();
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// Any parameters written to the display engine are not activated until
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// CONFIG_VALID is set.
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SetConfigValid ();
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return EFI_SUCCESS;
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}
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/** This function de-initializes the display.
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**/
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VOID
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LcdShutdown (
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VOID
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)
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{
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// Disable graphics layer.
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LayerGraphicsDisable ();
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}
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