mirror of https://github.com/acidanthera/audk.git
563 lines
18 KiB
C
563 lines
18 KiB
C
/** @file
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Produces the CPU I/O 2 Protocol.
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Copyright (c) 2009, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuIo2Dxe.h"
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EFI_HANDLE mHandle = NULL;
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EFI_CPU_IO2_PROTOCOL mCpuIo = {
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{
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CpuMemoryServiceRead,
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CpuMemoryServiceWrite
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},
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{
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CpuIoServiceRead,
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CpuIoServiceWrite
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}
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};
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/**
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Worker function to check the validation of parameters for CPU I/O interface functions.
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This function check the validation of parameters for CPU I/O interface functions.
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@param Width Width of the Mmio/Io operation
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@param Address Base address of the Mmio/Io operation
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@param Count Count of the number of accesses to perform
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@param Buffer Pointer to the buffer to read from memory
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@param Limit Maximum address supported
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@retval EFI_INVALID_PARAMETER Buffer is NULL
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@retval EFI_UNSUPPORTED The address range specified by Width, Address and Count is invalid
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@retval EFI_UNSUPPORTED The memory buffer is not aligned
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@retval EFI_SUCCESS Parameters are valid
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**/
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EFI_STATUS
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CpuIoCheckParameter (
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer,
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IN UINT64 Limit
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)
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{
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UINTN AlignMask;
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if (Buffer == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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if (Address > Limit) {
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return EFI_UNSUPPORTED;
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}
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//
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// For FiFo type, the target address won't increase during the access,
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// so treat count as 1
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//
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if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
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Count = 1;
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}
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Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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if (Address - 1 + (UINT32)(1 << Width) * Count > Limit) {
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return EFI_UNSUPPORTED;
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}
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AlignMask = (1 << Width) - 1;
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if ((UINTN) Buffer & AlignMask) {
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return EFI_UNSUPPORTED;
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}
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return EFI_SUCCESS;
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}
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/**
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Worker function to update access width and count for access to the unaligned address.
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Unaligned Io/MmIo address access, break up the request into word by word or byte by byte.
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@param Address Base address of the Mmio/Io operation
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@param PtrWidth Pointer to width of the Mmio/Io operation
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Out, this value will be updated for access to the unaligned address.
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@param PtrCount Pointer to count of the number of accesses to perform
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Out, this value will be updated for access to the unaligned address.
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**/
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VOID
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CpuIoUpdateWidthCount (
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IN UINT64 Address,
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IN OUT EFI_CPU_IO_PROTOCOL_WIDTH *PtrWidth,
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IN OUT UINTN *PtrCount
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)
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{
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EFI_CPU_IO_PROTOCOL_WIDTH BufferWidth;
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UINTN BufferCount;
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BufferWidth = *PtrWidth;
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BufferCount = *PtrCount;
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switch (BufferWidth) {
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case EfiCpuIoWidthUint8:
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break;
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case EfiCpuIoWidthUint16:
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if ((Address & 0x01) == 0) {
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break;
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} else {
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BufferCount = BufferCount * 2;
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BufferWidth = EfiCpuIoWidthUint8;
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}
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break;
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case EfiCpuIoWidthUint32:
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if ((Address & 0x03) == 0) {
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break;
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} else if ((Address & 0x01) == 0) {
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BufferCount = BufferCount * 2;
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BufferWidth = EfiCpuIoWidthUint16;
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} else {
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BufferCount = BufferCount * 4;
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BufferWidth = EfiCpuIoWidthUint8;
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}
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break;
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case EfiCpuIoWidthUint64:
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if ((Address & 0x07) == 0) {
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break;
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} else if ((Address & 0x03) == 0) {
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BufferCount = BufferCount * 2;
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BufferWidth = EfiCpuIoWidthUint32;
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} else if ((Address & 0x01) == 0) {
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BufferCount = BufferCount * 4;
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BufferWidth = EfiCpuIoWidthUint16;
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} else {
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BufferCount = BufferCount * 8;
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BufferWidth = EfiCpuIoWidthUint8;
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}
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break;
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default:
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return;
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}
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*PtrWidth = BufferWidth;
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*PtrCount = BufferCount;
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return;
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}
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/**
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Worker function to perform memory mapped I/O read/write
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This function provides private services to perform memory mapped I/O read/write.
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@param Width Width of the memory mapped I/O operation
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@param Count Count of the number of accesses to perform
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@param DestinationStrideFlag Boolean flag indicates if the destination is to be incremented
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@param Destination Destination of the memory mapped I/O operation
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@param SourceStrideFlag Boolean flag indicates if the source is to be incremented
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@param Source Source of the memory mapped I/O operation
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@retval EFI_SUCCESS Successful operation
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@retval EFI_INVALID_PARAMETER Width is invalid
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**/
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EFI_STATUS
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CpuIoMemRW (
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINTN Count,
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IN BOOLEAN DestinationStrideFlag,
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OUT PTR Destination,
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IN BOOLEAN SourceStrideFlag,
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IN PTR Source
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)
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{
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UINTN Stride;
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UINTN DestinationStride;
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UINTN SourceStride;
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Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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Stride = (UINT32)(1 << Width);
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DestinationStride = DestinationStrideFlag ? Stride : 0;
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SourceStride = SourceStrideFlag ? Stride : 0;
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//
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// Loop for each iteration and move the data
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//
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switch (Width) {
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case EfiCpuIoWidthUint8:
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for (; Count > 0; Count--, Destination.Buf += DestinationStride, Source.Buf += SourceStride) {
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MmioWrite8((UINTN)Destination.Ui8 , MmioRead8((UINTN)Source.Ui8));
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}
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break;
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case EfiCpuIoWidthUint16:
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for (; Count > 0; Count--, Destination.Buf += DestinationStride, Source.Buf += SourceStride) {
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MmioWrite16((UINTN)Destination.Ui16 , MmioRead16((UINTN)Source.Ui16));
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}
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break;
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case EfiCpuIoWidthUint32:
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for (; Count > 0; Count--, Destination.Buf += DestinationStride, Source.Buf += SourceStride) {
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MmioWrite32((UINTN)Destination.Ui32 , MmioRead32((UINTN)Source.Ui32));
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}
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break;
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case EfiCpuIoWidthUint64:
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for (; Count > 0; Count--, Destination.Buf += DestinationStride, Source.Buf += SourceStride) {
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MmioWrite64((UINTN)Destination.Ui64 , MmioRead64((UINTN)Source.Ui64));
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}
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break;
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default:
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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Enables a driver to read memory-mapped registers in the PI System memory space.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the memory operation.
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@param[in] Address The base address of the memory operation.
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@param[in] Count The number of memory operations to perform. The number of bytes moved
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is Width size * Count, starting at Address.
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@param[out] Buffer The destination buffer to store the results.
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@retval EFI_SUCCESS The data was read from or written to the EFI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceRead (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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PTR Source;
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PTR Destination;
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EFI_STATUS Status;
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EFI_CPU_IO_PROTOCOL_WIDTH BufferWidth;
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Status = CpuIoCheckParameter (Width, Address, Count, Buffer, MAX_ADDRESS);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Destination.Buf = Buffer;
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Source.Buf = (VOID *) (UINTN) Address;
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//
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// Support access to unaligned mmio address.
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// Break up the request into byte by byte
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//
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BufferWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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CpuIoUpdateWidthCount (Address, &BufferWidth, &Count);
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if (Width >= EfiCpuIoWidthUint8 && Width <= EfiCpuIoWidthUint64) {
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return CpuIoMemRW (BufferWidth, Count, TRUE, Destination, TRUE, Source);
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}
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if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
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return CpuIoMemRW (BufferWidth, Count, TRUE, Destination, FALSE, Source);
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}
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if (Width >= EfiCpuIoWidthFillUint8 && Width <= EfiCpuIoWidthFillUint64) {
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return CpuIoMemRW (BufferWidth, Count, FALSE, Destination, TRUE, Source);
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}
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return EFI_INVALID_PARAMETER;
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}
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/**
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Enables a driver to write memory-mapped registers in the PI System memory space.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the memory operation.
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@param[in] Address The base address of the memory operation.
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@param[in] Count The number of memory operations to perform. The number of bytes moved
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is Width size * Count, starting at Address.
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@param[in] Buffer The source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the EFI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuMemoryServiceWrite (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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PTR Source;
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PTR Destination;
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EFI_STATUS Status;
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EFI_CPU_IO_PROTOCOL_WIDTH BufferWidth;
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Status = CpuIoCheckParameter (Width, Address, Count, Buffer, MAX_ADDRESS);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Destination.Buf = (VOID *) (UINTN) Address;
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Source.Buf = Buffer;
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//
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// Support access to unaligned mmio address.
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// Break up the request into byte by byte
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//
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BufferWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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CpuIoUpdateWidthCount (Address, &BufferWidth, &Count);
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if (Width >= EfiCpuIoWidthUint8 && Width <= EfiCpuIoWidthUint64) {
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return CpuIoMemRW (BufferWidth, Count, TRUE, Destination, TRUE, Source);
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}
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if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
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return CpuIoMemRW (BufferWidth, Count, FALSE, Destination, TRUE, Source);
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}
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if (Width >= EfiCpuIoWidthFillUint8 && Width <= EfiCpuIoWidthFillUint64) {
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return CpuIoMemRW (BufferWidth, Count, TRUE, Destination, FALSE, Source);
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}
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return EFI_INVALID_PARAMETER;
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}
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/**
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Enables a driver to read registers in the PI CPU I/O space.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O operation.
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@param[in] UserAddress The base address of the I/O operation. The caller is responsible
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for aligning the Address if required.
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@param[in] Count The number of I/O operations to perform. The number of bytes moved
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is Width size * Count, starting at Address.
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@param[out] UserBuffer The destination buffer to store the results.
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@retval EFI_SUCCESS The data was read from or written to the EFI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceRead (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 UserAddress,
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IN UINTN Count,
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OUT VOID *UserBuffer
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)
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{
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UINTN InStride;
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UINTN OutStride;
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UINTN Address;
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PTR Buffer;
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EFI_STATUS Status;
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EFI_CPU_IO_PROTOCOL_WIDTH BufferWidth;
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Buffer.Buf = (UINT8 *) UserBuffer;
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if (Width >= EfiCpuIoWidthMaximum) {
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return EFI_INVALID_PARAMETER;
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}
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Status = CpuIoCheckParameter (Width, UserAddress, Count, UserBuffer, IA32_MAX_IO_ADDRESS);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Support access to unaligned IO address.
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// Break up the request into byte by byte
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//
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BufferWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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CpuIoUpdateWidthCount (UserAddress, &BufferWidth, &Count);
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Address = (UINTN) UserAddress;
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InStride = (UINT32)(1 << (BufferWidth & 0x03));
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OutStride = InStride;
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if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
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InStride = 0;
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}
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if (Width >= EfiCpuIoWidthFillUint8 && Width <= EfiCpuIoWidthFillUint64) {
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OutStride = 0;
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}
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//
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// Loop for each iteration and move the data
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//
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switch (BufferWidth) {
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case EfiCpuIoWidthUint8:
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for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
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*Buffer.Ui8 = IoRead8 (Address);
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}
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break;
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case EfiCpuIoWidthUint16:
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for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
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*Buffer.Ui16 = IoRead16 (Address);
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}
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break;
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case EfiCpuIoWidthUint32:
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for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
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*Buffer.Ui32 = IoRead32 (Address);
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}
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break;
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default:
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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Enables a driver to write registers in the PI CPU I/O space.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O operation.
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@param[in] UserAddress The base address of the I/O operation. The caller is responsible
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for aligning the Address if required.
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@param[in] Count The number of I/O operations to perform. The number of bytes moved
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is Width size * Count, starting at Address.
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@param[in] UserBuffer The source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the EFI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
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**/
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EFI_STATUS
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EFIAPI
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CpuIoServiceWrite (
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 UserAddress,
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IN UINTN Count,
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IN VOID *UserBuffer
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)
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{
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UINTN InStride;
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UINTN OutStride;
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UINTN Address;
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PTR Buffer;
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EFI_STATUS Status;
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EFI_CPU_IO_PROTOCOL_WIDTH BufferWidth;
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Buffer.Buf = (UINT8 *) UserBuffer;
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if (Width >= EfiCpuIoWidthMaximum) {
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return EFI_INVALID_PARAMETER;
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}
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Status = CpuIoCheckParameter (Width, UserAddress, Count, UserBuffer, IA32_MAX_IO_ADDRESS);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Support access to unaligned IO address.
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// Break up the request into byte by byte
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//
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BufferWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
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CpuIoUpdateWidthCount (UserAddress, &BufferWidth, &Count);
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Address = (UINTN) UserAddress;
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InStride = (UINT32)(1 << (BufferWidth & 0x03));
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OutStride = InStride;
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if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
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InStride = 0;
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}
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if (Width >= EfiCpuIoWidthFillUint8 && Width <= EfiCpuIoWidthFillUint64) {
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OutStride = 0;
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}
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//
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// Loop for each iteration and move the data
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//
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switch (BufferWidth) {
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case EfiCpuIoWidthUint8:
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for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
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IoWrite8 (Address, *Buffer.Ui8);
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}
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break;
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case EfiCpuIoWidthUint16:
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for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
|
|
IoWrite16 (Address, *Buffer.Ui16);
|
|
}
|
|
break;
|
|
|
|
case EfiCpuIoWidthUint32:
|
|
for (; Count > 0; Count--, Buffer.Buf += OutStride, Address += InStride) {
|
|
IoWrite32 (Address, *Buffer.Ui32);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
Entrypoint of CPU I/O 2 DXE module.
|
|
|
|
@param ImageHandle The firmware allocated handle for the EFI image.
|
|
@param SystemTable A pointer to the EFI System Table.
|
|
|
|
@retval EFI_SUCCESS The entry point is executed successfully.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
CpuIo2Initialize (
|
|
IN EFI_HANDLE ImageHandle,
|
|
IN EFI_SYSTEM_TABLE *SystemTable
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
|
|
Status = gBS->InstallProtocolInterface (
|
|
&mHandle,
|
|
&gEfiCpuIo2ProtocolGuid,
|
|
EFI_NATIVE_INTERFACE,
|
|
&mCpuIo
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
return Status;
|
|
}
|