mirror of https://github.com/acidanthera/audk.git
713aea3486
Peculiarly enough, the current page table manipulation code takes it upon itself to write back and invalidate the memory contents covered by page and section mappings when their memory attributes change. It is not generally the case that data must be written back when such a change occurs, even when switching from cacheable to non-cacheable attributes, and in some cases, it is actually causing problems. (The cache maintenance is also performed on the PCIe MMIO regions as they get mapped by the PCI bus driver, and under virtualization, each cache maintenance operation on an emulated MMIO region triggers a round trip to the host and back) So let's just drop this code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> |
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ArmArchTimerLib | ||
ArmCacheMaintenanceLib | ||
ArmDisassemblerLib | ||
ArmExceptionLib | ||
ArmGenericTimerPhyCounterLib | ||
ArmGenericTimerVirtCounterLib | ||
ArmGicArchLib | ||
ArmGicArchSecLib | ||
ArmHvcLib | ||
ArmLib | ||
ArmMmuLib | ||
ArmMtlNullLib | ||
ArmPsciResetSystemLib | ||
ArmSmcLib | ||
ArmSmcLibNull | ||
ArmSmcPsciResetSystemLib | ||
ArmSoftFloatLib | ||
ArmSvcLib | ||
CompilerIntrinsicsLib | ||
DebugAgentSymbolsBaseLib | ||
DebugPeCoffExtraActionLib | ||
DefaultExceptionHandlerLib | ||
GccLto | ||
PeiServicesTablePointerLib | ||
PlatformBootManagerLib | ||
RvdPeCoffExtraActionLib | ||
SemiHostingDebugLib | ||
SemiHostingSerialPortLib | ||
SemihostLib |