mirror of https://github.com/acidanthera/audk.git
156 lines
7.0 KiB
C
156 lines
7.0 KiB
C
/** @file
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EFI MM Access PPI definition.
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This PPI is used to control the visibility of the MMRAM on the platform.
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The EFI_PEI_MM_ACCESS_PPI abstracts the location and characteristics of MMRAM. The
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principal functionality found in the memory controller includes the following:
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- Exposing the MMRAM to all non-MM agents, or the "open" state
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- Shrouding the MMRAM to all but the MM agents, or the "closed" state
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- Preserving the system integrity, or "locking" the MMRAM, such that the settings cannot be
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perturbed by either boot service or runtime agents
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Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Revision Reference:
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This PPI is introduced in PI Version 1.5.
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**/
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#ifndef _MM_ACCESS_PPI_H_
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#define _MM_ACCESS_PPI_H_
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#define EFI_PEI_MM_ACCESS_PPI_GUID \
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{ 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}
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typedef struct _EFI_PEI_MM_ACCESS_PPI EFI_PEI_MM_ACCESS_PPI;
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/**
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Opens the MMRAM area to be accessible by a PEIM.
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This function "opens" MMRAM so that it is visible while not inside of MM. The function should
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return EFI_UNSUPPORTED if the hardware does not support hiding of MMRAM. The function
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should return EFI_DEVICE_ERROR if the MMRAM configuration is locked.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This The EFI_PEI_MM_ACCESS_PPI instance.
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@param DescriptorIndex The region of MMRAM to Open.
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@retval EFI_SUCCESS The operation was successful.
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@retval EFI_UNSUPPORTED The system does not support opening and closing of MMRAM.
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@retval EFI_DEVICE_ERROR MMRAM cannot be opened, perhaps because it is locked.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_MM_OPEN)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_MM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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Inhibits access to the MMRAM.
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This function "closes" MMRAM so that it is not visible while outside of MM. The function should
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return EFI_UNSUPPORTED if the hardware does not support hiding of MMRAM.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This The EFI_PEI_MM_ACCESS_PPI instance.
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@param DescriptorIndex The region of MMRAM to Close.
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@retval EFI_SUCCESS The operation was successful.
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@retval EFI_UNSUPPORTED The system does not support opening and closing of MMRAM.
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@retval EFI_DEVICE_ERROR MMRAM cannot be closed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_MM_CLOSE)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_MM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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This function prohibits access to the MMRAM region. This function is usually implemented such
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that it is a write-once operation.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This The EFI_PEI_MM_ACCESS_PPI instance.
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@param DescriptorIndex The region of MMRAM to Lock.
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@retval EFI_SUCCESS The operation was successful.
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@retval EFI_UNSUPPORTED The system does not support opening and closing of MMRAM.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_MM_LOCK)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_MM_ACCESS_PPI *This,
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IN UINTN DescriptorIndex
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);
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/**
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Queries the memory controller for the possible regions that will support MMRAM.
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This function describes the MMRAM regions.
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This data structure forms the contract between the MM_ACCESS and MM_IPL drivers. There is an
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ambiguity when any MMRAM region is remapped. For example, on some chipsets, some MMRAM
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regions can be initialized at one physical address but is later accessed at another processor address.
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There is currently no way for the MM IPL driver to know that it must use two different addresses
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depending on what it is trying to do. As a result, initial configuration and loading can use the
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physical address PhysicalStart while MMRAM is open. However, once the region has been
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closed and needs to be accessed by agents in MM, the CpuStart address must be used.
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This PPI publishes the available memory that the chipset can shroud for the use of installing code.
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These regions serve the dual purpose of describing which regions have been open, closed, or locked.
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In addition, these regions may include overlapping memory ranges, depending on the chipset
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implementation. The latter might include a chipset that supports T-SEG, where memory near the top
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of the physical DRAM can be allocated for MMRAM too.
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The key thing to note is that the regions that are described by the PPI are a subset of the capabilities
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of the hardware.
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@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
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@param This The EFI_PEI_MM_ACCESS_PPI instance.
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@param MmramMapSize A pointer to the size, in bytes, of the MmramMemoryMap buffer. On input, this value is
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the size of the buffer that is allocated by the caller. On output, it is the size of the
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buffer that was returned by the firmware if the buffer was large enough, or, if the
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buffer was too small, the size of the buffer that is needed to contain the map.
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@param MmramMap A pointer to the buffer in which firmware places the current memory map. The map is
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an array of EFI_MMRAM_DESCRIPTORs
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@retval EFI_SUCCESS The chipset supported the given resource.
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@retval EFI_BUFFER_TOO_SMALL The MmramMap parameter was too small. The current
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buffer size needed to hold the memory map is returned in
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MmramMapSize.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_MM_CAPABILITIES)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_MM_ACCESS_PPI *This,
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IN OUT UINTN *MmramMapSize,
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IN OUT EFI_MMRAM_DESCRIPTOR *MmramMap
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);
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///
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/// EFI MM Access PPI is used to control the visibility of the MMRAM on the platform.
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/// It abstracts the location and characteristics of MMRAM. The platform should report
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/// all MMRAM via EFI_PEI_MM_ACCESS_PPI. The expectation is that the north bridge or
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/// memory controller would publish this PPI.
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///
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struct _EFI_PEI_MM_ACCESS_PPI {
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EFI_PEI_MM_OPEN Open;
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EFI_PEI_MM_CLOSE Close;
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EFI_PEI_MM_LOCK Lock;
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EFI_PEI_MM_CAPABILITIES GetCapabilities;
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BOOLEAN LockState;
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BOOLEAN OpenState;
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};
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extern EFI_GUID gEfiPeiMmAccessPpiGuid;
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#endif
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