mirror of https://github.com/acidanthera/audk.git
1249 lines
35 KiB
C
1249 lines
35 KiB
C
/** @file
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PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
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which is used to enable recovery function from USB Drivers.
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Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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of the BSD License which accompanies this distribution. The
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full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "EhcPeim.h"
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//
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// Two arrays used to translate the EHCI port state (change)
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// to the UEFI protocol's port state (change).
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//
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USB_PORT_STATE_MAP mUsbPortStateMap[] = {
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{PORTSC_CONN, USB_PORT_STAT_CONNECTION},
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{PORTSC_ENABLED, USB_PORT_STAT_ENABLE},
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{PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},
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{PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},
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{PORTSC_RESET, USB_PORT_STAT_RESET},
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{PORTSC_POWER, USB_PORT_STAT_POWER},
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{PORTSC_OWNER, USB_PORT_STAT_OWNER}
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};
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USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
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{PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},
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{PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},
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{PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}
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};
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/**
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Read Ehc Operation register.
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@param Ehc The EHCI device.
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@param Offset The operation register offset.
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@retval the register content read.
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**/
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UINT32
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EhcReadOpReg (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset
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)
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{
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UINT32 Data;
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ASSERT (Ehc->CapLen != 0);
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Data = MmioRead32 (Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset);
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return Data;
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}
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/**
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Write the data to the EHCI operation register.
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@param Ehc The EHCI device.
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@param Offset EHCI operation register offset.
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@param Data The data to write.
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**/
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VOID
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EhcWriteOpReg (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset,
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IN UINT32 Data
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)
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{
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ASSERT (Ehc->CapLen != 0);
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MmioWrite32(Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);
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}
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/**
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Set one bit of the operational register while keeping other bits.
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@param Ehc The EHCI device.
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@param Offset The offset of the operational register.
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@param Bit The bit mask of the register to set.
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**/
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VOID
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EhcSetOpRegBit (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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{
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UINT32 Data;
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Data = EhcReadOpReg (Ehc, Offset);
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Data |= Bit;
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EhcWriteOpReg (Ehc, Offset, Data);
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}
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/**
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Clear one bit of the operational register while keeping other bits.
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@param Ehc The EHCI device.
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@param Offset The offset of the operational register.
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@param Bit The bit mask of the register to clear.
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**/
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VOID
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EhcClearOpRegBit (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset,
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IN UINT32 Bit
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)
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{
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UINT32 Data;
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Data = EhcReadOpReg (Ehc, Offset);
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Data &= ~Bit;
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EhcWriteOpReg (Ehc, Offset, Data);
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}
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/**
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Wait the operation register's bit as specified by Bit
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to become set (or clear).
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@param Ehc The EHCI device.
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@param Offset The offset of the operational register.
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@param Bit The bit mask of the register to wait for.
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@param WaitToSet Wait the bit to set or clear.
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@param Timeout The time to wait before abort (in millisecond).
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@retval EFI_SUCCESS The bit successfully changed by host controller.
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@retval EFI_TIMEOUT The time out occurred.
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**/
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EFI_STATUS
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EhcWaitOpRegBit (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset,
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IN UINT32 Bit,
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IN BOOLEAN WaitToSet,
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IN UINT32 Timeout
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)
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{
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UINT32 Index;
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for (Index = 0; Index < Timeout / EHC_SYNC_POLL_INTERVAL + 1; Index++) {
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if (EHC_REG_BIT_IS_SET (Ehc, Offset, Bit) == WaitToSet) {
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return EFI_SUCCESS;
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}
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MicroSecondDelay (EHC_SYNC_POLL_INTERVAL);
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}
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return EFI_TIMEOUT;
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}
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/**
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Read EHCI capability register.
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@param Ehc The EHCI device.
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@param Offset Capability register address.
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@retval the register content read.
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**/
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UINT32
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EhcReadCapRegister (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Offset
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)
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{
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UINT32 Data;
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Data = MmioRead32(Ehc->UsbHostControllerBaseAddress + Offset);
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return Data;
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}
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/**
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Set door bell and wait it to be ACKed by host controller.
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This function is used to synchronize with the hardware.
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@param Ehc The EHCI device.
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@param Timeout The time to wait before abort (in millisecond, ms).
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@retval EFI_TIMEOUT Time out happened while waiting door bell to set.
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@retval EFI_SUCCESS Synchronized with the hardware.
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**/
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EFI_STATUS
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EhcSetAndWaitDoorBell (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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UINT32 Data;
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_IAAD);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_IAA, TRUE, Timeout);
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//
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// ACK the IAA bit in USBSTS register. Make sure other
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// interrupt bits are not ACKed. These bits are WC (Write Clean).
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//
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Data = EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET);
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Data &= ~USBSTS_INTACK_MASK;
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Data |= USBSTS_IAA;
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EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, Data);
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return Status;
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}
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/**
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Clear all the interrutp status bits, these bits
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are Write-Clean.
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@param Ehc The EHCI device.
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**/
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VOID
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EhcAckAllInterrupt (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK);
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}
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/**
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Enable the periodic schedule then wait EHC to
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actually enable it.
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@param Ehc The EHCI device.
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@param Timeout The time to wait before abort (in millisecond, ms).
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@retval EFI_TIMEOUT Time out happened while enabling periodic schedule.
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@retval EFI_SUCCESS The periodical schedule is enabled.
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**/
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EFI_STATUS
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EhcEnablePeriodSchd (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_PERIOD_ENABLED, TRUE, Timeout);
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return Status;
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}
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/**
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Enable asynchrounous schedule.
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@param Ehc The EHCI device.
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@param Timeout Time to wait before abort.
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@retval EFI_SUCCESS The EHCI asynchronous schedule is enabled.
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@retval Others Failed to enable the asynchronous scheudle.
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**/
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EFI_STATUS
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EhcEnableAsyncSchd (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_ASYNC);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_ASYNC_ENABLED, TRUE, Timeout);
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return Status;
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}
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/**
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Check whether Ehc is halted.
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@param Ehc The EHCI device.
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@retval TRUE The controller is halted.
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@retval FALSE The controller isn't halted.
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**/
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BOOLEAN
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EhcIsHalt (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT);
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}
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/**
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Check whether system error occurred.
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@param Ehc The EHCI device.
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@retval TRUE System error happened.
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@retval FALSE No system error.
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**/
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BOOLEAN
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EhcIsSysError (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR);
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}
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/**
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Reset the host controller.
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@param Ehc The EHCI device.
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@param Timeout Time to wait before abort (in millisecond, ms).
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@retval EFI_TIMEOUT The transfer failed due to time out.
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@retval Others Failed to reset the host.
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**/
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EFI_STATUS
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EhcResetHC (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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//
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// Host can only be reset when it is halt. If not so, halt it
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//
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if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {
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Status = EhcHaltHC (Ehc, Timeout);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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}
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RESET);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RESET, FALSE, Timeout);
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return Status;
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}
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/**
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Halt the host controller.
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@param Ehc The EHCI device.
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@param Timeout Time to wait before abort.
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@retval EFI_TIMEOUT Failed to halt the controller before Timeout.
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@retval EFI_SUCCESS The EHCI is halt.
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**/
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EFI_STATUS
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EhcHaltHC (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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EhcClearOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout);
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return Status;
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}
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/**
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Set the EHCI to run.
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@param Ehc The EHCI device.
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@param Timeout Time to wait before abort.
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@retval EFI_SUCCESS The EHCI is running.
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@retval Others Failed to set the EHCI to run.
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**/
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EFI_STATUS
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EhcRunHC (
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IN PEI_USB2_HC_DEV *Ehc,
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IN UINT32 Timeout
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)
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{
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EFI_STATUS Status;
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
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Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, FALSE, Timeout);
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return Status;
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}
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/**
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Initialize the HC hardware.
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EHCI spec lists the five things to do to initialize the hardware.
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1. Program CTRLDSSEGMENT.
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2. Set USBINTR to enable interrupts.
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3. Set periodic list base.
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4. Set USBCMD, interrupt threshold, frame list size etc.
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5. Write 1 to CONFIGFLAG to route all ports to EHCI.
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@param Ehc The EHCI device.
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@retval EFI_SUCCESS The EHCI has come out of halt state.
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@retval EFI_TIMEOUT Time out happened.
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**/
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EFI_STATUS
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EhcInitHC (
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IN PEI_USB2_HC_DEV *Ehc
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)
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{
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS TempPtr;
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UINTN PageNumber;
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ASSERT (EhcIsHalt (Ehc));
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//
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// Allocate the periodic frame and associated memeory
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// management facilities if not already done.
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//
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if (Ehc->PeriodFrame != NULL) {
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EhcFreeSched (Ehc);
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}
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PageNumber = sizeof(PEI_URB)/PAGESIZE +1;
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Status = PeiServicesAllocatePages (
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EfiBootServicesCode,
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PageNumber,
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&TempPtr
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);
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Ehc->Urb = (PEI_URB *) ((UINTN) TempPtr);
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if (Ehc->Urb == NULL) {
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return Status;
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}
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Status = EhcInitSched (Ehc);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// 1. Program the CTRLDSSEGMENT register with the high 32 bit addr
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//
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EhcWriteOpReg (Ehc, EHC_CTRLDSSEG_OFFSET, Ehc->High32bitAddr);
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//
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// 2. Clear USBINTR to disable all the interrupt. UEFI works by polling
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//
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EhcWriteOpReg (Ehc, EHC_USBINTR_OFFSET, 0);
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//
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// 3. Program periodic frame list, already done in EhcInitSched
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// 4. Start the Host Controller
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//
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EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
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//
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// 5. Set all ports routing to EHC
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//
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EhcSetOpRegBit (Ehc, EHC_CONFIG_FLAG_OFFSET, CONFIGFLAG_ROUTE_EHC);
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//
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// Wait roothub port power stable
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//
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MicroSecondDelay (EHC_ROOT_PORT_RECOVERY_STALL);
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Status = EhcEnablePeriodSchd (Ehc, EHC_GENERIC_TIMEOUT);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = EhcEnableAsyncSchd (Ehc, EHC_GENERIC_TIMEOUT);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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return EFI_SUCCESS;
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}
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/**
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Submits bulk transfer to a bulk endpoint of a USB device.
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@param PeiServices The pointer of EFI_PEI_SERVICES.
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@param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
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@param DeviceAddress Target device address.
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@param EndPointAddress Endpoint number and its direction in bit 7.
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@param DeviceSpeed Device speed, Low speed device doesn't support
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bulk transfer.
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@param MaximumPacketLength Maximum packet size the endpoint is capable of
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sending or receiving.
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@param Data Array of pointers to the buffers of data to transmit
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from or receive into.
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@param DataLength The lenght of the data buffer.
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@param DataToggle On input, the initial data toggle for the transfer;
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On output, it is updated to to next data toggle to use of
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the subsequent bulk transfer.
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@param TimeOut Indicates the maximum time, in millisecond, which the
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transfer is allowed to complete.
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@param Translator A pointr to the transaction translator data.
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@param TransferResult A pointer to the detailed result information of the
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bulk transfer.
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@retval EFI_SUCCESS The transfer was completed successfully.
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@retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
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@retval EFI_INVALID_PARAMETER Parameters are invalid.
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@retval EFI_TIMEOUT The transfer failed due to timeout.
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@retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
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**/
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EFI_STATUS
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EFIAPI
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EhcBulkTransfer (
|
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_USB2_HOST_CONTROLLER_PPI *This,
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IN UINT8 DeviceAddress,
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IN UINT8 EndPointAddress,
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IN UINT8 DeviceSpeed,
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IN UINTN MaximumPacketLength,
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IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
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IN OUT UINTN *DataLength,
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IN OUT UINT8 *DataToggle,
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IN UINTN TimeOut,
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IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
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OUT UINT32 *TransferResult
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)
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{
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PEI_USB2_HC_DEV *Ehc;
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PEI_URB *Urb;
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EFI_STATUS Status;
|
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//
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// Validate the parameters
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//
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if ((DataLength == NULL) || (*DataLength == 0) ||
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(Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
|
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|
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if ((*DataToggle != 0) && (*DataToggle != 1)) {
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return EFI_INVALID_PARAMETER;
|
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}
|
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|
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if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
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((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
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((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
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return EFI_INVALID_PARAMETER;
|
|
}
|
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|
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Ehc =PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
|
|
*TransferResult = EFI_USB_ERR_SYSTEM;
|
|
Status = EFI_DEVICE_ERROR;
|
|
|
|
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
|
|
EhcAckAllInterrupt (Ehc);
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
EhcAckAllInterrupt (Ehc);
|
|
|
|
//
|
|
// Create a new URB, insert it into the asynchronous
|
|
// schedule list, then poll the execution status.
|
|
//
|
|
Urb = EhcCreateUrb (
|
|
Ehc,
|
|
DeviceAddress,
|
|
EndPointAddress,
|
|
DeviceSpeed,
|
|
*DataToggle,
|
|
MaximumPacketLength,
|
|
Translator,
|
|
EHC_BULK_TRANSFER,
|
|
NULL,
|
|
Data[0],
|
|
*DataLength,
|
|
NULL,
|
|
NULL,
|
|
1
|
|
);
|
|
|
|
if (Urb == NULL) {
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
EhcLinkQhToAsync (Ehc, Urb->Qh);
|
|
Status = EhcExecTransfer (Ehc, Urb, TimeOut);
|
|
EhcUnlinkQhFromAsync (Ehc, Urb->Qh);
|
|
|
|
*TransferResult = Urb->Result;
|
|
*DataLength = Urb->Completed;
|
|
*DataToggle = Urb->DataToggle;
|
|
|
|
if (*TransferResult == EFI_USB_NOERROR) {
|
|
Status = EFI_SUCCESS;
|
|
}
|
|
|
|
EhcAckAllInterrupt (Ehc);
|
|
EhcFreeUrb (Ehc, Urb);
|
|
|
|
ON_EXIT:
|
|
return Status;
|
|
}
|
|
|
|
/**
|
|
Retrieves the number of root hub ports.
|
|
|
|
@param[in] PeiServices The pointer to the PEI Services Table.
|
|
@param[in] This The pointer to this instance of the
|
|
PEI_USB2_HOST_CONTROLLER_PPI.
|
|
@param[out] PortNumber The pointer to the number of the root hub ports.
|
|
|
|
@retval EFI_SUCCESS The port number was retrieved successfully.
|
|
@retval EFI_INVALID_PARAMETER PortNumber is NULL.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcGetRootHubPortNumber (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN PEI_USB2_HOST_CONTROLLER_PPI *This,
|
|
OUT UINT8 *PortNumber
|
|
)
|
|
{
|
|
|
|
PEI_USB2_HC_DEV *EhcDev;
|
|
EhcDev = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
|
|
|
|
if (PortNumber == NULL) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
*PortNumber = (UINT8)(EhcDev->HcStructParams & HCSP_NPORTS);
|
|
return EFI_SUCCESS;
|
|
|
|
}
|
|
|
|
/**
|
|
Clears a feature for the specified root hub port.
|
|
|
|
@param PeiServices The pointer of EFI_PEI_SERVICES.
|
|
@param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
|
|
@param PortNumber Specifies the root hub port whose feature
|
|
is requested to be cleared.
|
|
@param PortFeature Indicates the feature selector associated with the
|
|
feature clear request.
|
|
|
|
@retval EFI_SUCCESS The feature specified by PortFeature was cleared
|
|
for the USB root hub port specified by PortNumber.
|
|
@retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcClearRootHubPortFeature (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN PEI_USB2_HOST_CONTROLLER_PPI *This,
|
|
IN UINT8 PortNumber,
|
|
IN EFI_USB_PORT_FEATURE PortFeature
|
|
)
|
|
{
|
|
PEI_USB2_HC_DEV *Ehc;
|
|
UINT32 Offset;
|
|
UINT32 State;
|
|
UINT32 TotalPort;
|
|
EFI_STATUS Status;
|
|
|
|
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
|
|
Status = EFI_SUCCESS;
|
|
|
|
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
|
|
|
|
if (PortNumber >= TotalPort) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
|
|
State = EhcReadOpReg (Ehc, Offset);
|
|
State &= ~PORTSC_CHANGE_MASK;
|
|
|
|
switch (PortFeature) {
|
|
case EfiUsbPortEnable:
|
|
//
|
|
// Clear PORT_ENABLE feature means disable port.
|
|
//
|
|
State &= ~PORTSC_ENABLED;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortSuspend:
|
|
//
|
|
// A write of zero to this bit is ignored by the host
|
|
// controller. The host controller will unconditionally
|
|
// set this bit to a zero when:
|
|
// 1. software sets the Forct Port Resume bit to a zero from a one.
|
|
// 2. software sets the Port Reset bit to a one frome a zero.
|
|
//
|
|
State &= ~PORSTSC_RESUME;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortReset:
|
|
//
|
|
// Clear PORT_RESET means clear the reset signal.
|
|
//
|
|
State &= ~PORTSC_RESET;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortOwner:
|
|
//
|
|
// Clear port owner means this port owned by EHC
|
|
//
|
|
State &= ~PORTSC_OWNER;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortConnectChange:
|
|
//
|
|
// Clear connect status change
|
|
//
|
|
State |= PORTSC_CONN_CHANGE;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortEnableChange:
|
|
//
|
|
// Clear enable status change
|
|
//
|
|
State |= PORTSC_ENABLE_CHANGE;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortOverCurrentChange:
|
|
//
|
|
// Clear PortOverCurrent change
|
|
//
|
|
State |= PORTSC_OVERCUR_CHANGE;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortPower:
|
|
case EfiUsbPortSuspendChange:
|
|
case EfiUsbPortResetChange:
|
|
//
|
|
// Not supported or not related operation
|
|
//
|
|
break;
|
|
|
|
default:
|
|
Status = EFI_INVALID_PARAMETER;
|
|
break;
|
|
}
|
|
|
|
ON_EXIT:
|
|
return Status;
|
|
}
|
|
|
|
/**
|
|
Sets a feature for the specified root hub port.
|
|
|
|
@param PeiServices The pointer of EFI_PEI_SERVICES
|
|
@param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI
|
|
@param PortNumber Root hub port to set.
|
|
@param PortFeature Feature to set.
|
|
|
|
@retval EFI_SUCCESS The feature specified by PortFeature was set.
|
|
@retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
|
|
@retval EFI_TIMEOUT The time out occurred.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcSetRootHubPortFeature (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN PEI_USB2_HOST_CONTROLLER_PPI *This,
|
|
IN UINT8 PortNumber,
|
|
IN EFI_USB_PORT_FEATURE PortFeature
|
|
)
|
|
{
|
|
PEI_USB2_HC_DEV *Ehc;
|
|
UINT32 Offset;
|
|
UINT32 State;
|
|
UINT32 TotalPort;
|
|
EFI_STATUS Status;
|
|
|
|
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
|
|
Status = EFI_SUCCESS;
|
|
|
|
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
|
|
|
|
if (PortNumber >= TotalPort) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
|
|
State = EhcReadOpReg (Ehc, Offset);
|
|
|
|
//
|
|
// Mask off the port status change bits, these bits are
|
|
// write clean bit
|
|
//
|
|
State &= ~PORTSC_CHANGE_MASK;
|
|
|
|
switch (PortFeature) {
|
|
case EfiUsbPortEnable:
|
|
//
|
|
// Sofeware can't set this bit, Port can only be enable by
|
|
// EHCI as a part of the reset and enable
|
|
//
|
|
State |= PORTSC_ENABLED;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortSuspend:
|
|
State |= PORTSC_SUSPEND;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortReset:
|
|
//
|
|
// Make sure Host Controller not halt before reset it
|
|
//
|
|
if (EhcIsHalt (Ehc)) {
|
|
Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
|
|
|
|
if (EFI_ERROR (Status)) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
//
|
|
// Set one to PortReset bit must also set zero to PortEnable bit
|
|
//
|
|
State |= PORTSC_RESET;
|
|
State &= ~PORTSC_ENABLED;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
case EfiUsbPortPower:
|
|
//
|
|
// Not supported, ignore the operation
|
|
//
|
|
Status = EFI_SUCCESS;
|
|
break;
|
|
|
|
case EfiUsbPortOwner:
|
|
State |= PORTSC_OWNER;
|
|
EhcWriteOpReg (Ehc, Offset, State);
|
|
break;
|
|
|
|
default:
|
|
Status = EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
ON_EXIT:
|
|
return Status;
|
|
}
|
|
|
|
/**
|
|
Retrieves the current status of a USB root hub port.
|
|
|
|
@param PeiServices The pointer of EFI_PEI_SERVICES.
|
|
@param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
|
|
@param PortNumber The root hub port to retrieve the state from.
|
|
@param PortStatus Variable to receive the port state.
|
|
|
|
@retval EFI_SUCCESS The status of the USB root hub port specified.
|
|
by PortNumber was returned in PortStatus.
|
|
@retval EFI_INVALID_PARAMETER PortNumber is invalid.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcGetRootHubPortStatus (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN PEI_USB2_HOST_CONTROLLER_PPI *This,
|
|
IN UINT8 PortNumber,
|
|
OUT EFI_USB_PORT_STATUS *PortStatus
|
|
)
|
|
{
|
|
PEI_USB2_HC_DEV *Ehc;
|
|
UINT32 Offset;
|
|
UINT32 State;
|
|
UINT32 TotalPort;
|
|
UINTN Index;
|
|
UINTN MapSize;
|
|
EFI_STATUS Status;
|
|
|
|
if (PortStatus == NULL) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
|
|
Status = EFI_SUCCESS;
|
|
|
|
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
|
|
|
|
if (PortNumber >= TotalPort) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
|
|
PortStatus->PortStatus = 0;
|
|
PortStatus->PortChangeStatus = 0;
|
|
|
|
State = EhcReadOpReg (Ehc, Offset);
|
|
|
|
//
|
|
// Identify device speed. If in K state, it is low speed.
|
|
// If the port is enabled after reset, the device is of
|
|
// high speed. The USB bus driver should retrieve the actual
|
|
// port speed after reset.
|
|
//
|
|
if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {
|
|
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
|
|
|
|
} else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {
|
|
PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
|
|
}
|
|
|
|
//
|
|
// Convert the EHCI port/port change state to UEFI status
|
|
//
|
|
MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
|
|
|
|
for (Index = 0; Index < MapSize; Index++) {
|
|
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
|
|
PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
|
|
}
|
|
}
|
|
|
|
MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
|
|
|
|
for (Index = 0; Index < MapSize; Index++) {
|
|
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
|
|
PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
|
|
}
|
|
}
|
|
|
|
ON_EXIT:
|
|
return Status;
|
|
}
|
|
|
|
/**
|
|
Submits control transfer to a target USB device.
|
|
|
|
@param PeiServices The pointer of EFI_PEI_SERVICES.
|
|
@param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
|
|
@param DeviceAddress The target device address.
|
|
@param DeviceSpeed Target device speed.
|
|
@param MaximumPacketLength Maximum packet size the default control transfer
|
|
endpoint is capable of sending or receiving.
|
|
@param Request USB device request to send.
|
|
@param TransferDirection Specifies the data direction for the data stage.
|
|
@param Data Data buffer to be transmitted or received from USB device.
|
|
@param DataLength The size (in bytes) of the data buffer.
|
|
@param TimeOut Indicates the maximum timeout, in millisecond.
|
|
@param Translator Transaction translator to be used by this device.
|
|
@param TransferResult Return the result of this control transfer.
|
|
|
|
@retval EFI_SUCCESS Transfer was completed successfully.
|
|
@retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
|
|
@retval EFI_INVALID_PARAMETER Some parameters are invalid.
|
|
@retval EFI_TIMEOUT Transfer failed due to timeout.
|
|
@retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcControlTransfer (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN PEI_USB2_HOST_CONTROLLER_PPI *This,
|
|
IN UINT8 DeviceAddress,
|
|
IN UINT8 DeviceSpeed,
|
|
IN UINTN MaximumPacketLength,
|
|
IN EFI_USB_DEVICE_REQUEST *Request,
|
|
IN EFI_USB_DATA_DIRECTION TransferDirection,
|
|
IN OUT VOID *Data,
|
|
IN OUT UINTN *DataLength,
|
|
IN UINTN TimeOut,
|
|
IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
|
|
OUT UINT32 *TransferResult
|
|
)
|
|
{
|
|
PEI_USB2_HC_DEV *Ehc;
|
|
PEI_URB *Urb;
|
|
UINT8 Endpoint;
|
|
EFI_STATUS Status;
|
|
|
|
//
|
|
// Validate parameters
|
|
//
|
|
if ((Request == NULL) || (TransferResult == NULL)) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
if ((TransferDirection != EfiUsbDataIn) &&
|
|
(TransferDirection != EfiUsbDataOut) &&
|
|
(TransferDirection != EfiUsbNoData)) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
if ((TransferDirection == EfiUsbNoData) &&
|
|
((Data != NULL) || (*DataLength != 0))) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
if ((TransferDirection != EfiUsbNoData) &&
|
|
((Data == NULL) || (*DataLength == 0))) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
|
|
(MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
|
|
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
|
|
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
|
|
((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
|
|
|
|
Status = EFI_DEVICE_ERROR;
|
|
*TransferResult = EFI_USB_ERR_SYSTEM;
|
|
|
|
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {
|
|
EhcAckAllInterrupt (Ehc);
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
EhcAckAllInterrupt (Ehc);
|
|
|
|
//
|
|
// Create a new URB, insert it into the asynchronous
|
|
// schedule list, then poll the execution status.
|
|
//
|
|
//
|
|
// Encode the direction in address, although default control
|
|
// endpoint is bidirectional. EhcCreateUrb expects this
|
|
// combination of Ep addr and its direction.
|
|
//
|
|
Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
|
|
Urb = EhcCreateUrb (
|
|
Ehc,
|
|
DeviceAddress,
|
|
Endpoint,
|
|
DeviceSpeed,
|
|
0,
|
|
MaximumPacketLength,
|
|
Translator,
|
|
EHC_CTRL_TRANSFER,
|
|
Request,
|
|
Data,
|
|
*DataLength,
|
|
NULL,
|
|
NULL,
|
|
1
|
|
);
|
|
|
|
if (Urb == NULL) {
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
goto ON_EXIT;
|
|
}
|
|
|
|
EhcLinkQhToAsync (Ehc, Urb->Qh);
|
|
Status = EhcExecTransfer (Ehc, Urb, TimeOut);
|
|
EhcUnlinkQhFromAsync (Ehc, Urb->Qh);
|
|
|
|
//
|
|
// Get the status from URB. The result is updated in EhcCheckUrbResult
|
|
// which is called by EhcExecTransfer
|
|
//
|
|
*TransferResult = Urb->Result;
|
|
*DataLength = Urb->Completed;
|
|
|
|
if (*TransferResult == EFI_USB_NOERROR) {
|
|
Status = EFI_SUCCESS;
|
|
}
|
|
|
|
EhcAckAllInterrupt (Ehc);
|
|
EhcFreeUrb (Ehc, Urb);
|
|
|
|
ON_EXIT:
|
|
return Status;
|
|
}
|
|
|
|
/**
|
|
@param FileHandle Handle of the file being invoked.
|
|
@param PeiServices Describes the list of possible PEI Services.
|
|
|
|
@retval EFI_SUCCESS PPI successfully installed.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
EhcPeimEntry (
|
|
IN EFI_PEI_FILE_HANDLE FileHandle,
|
|
IN CONST EFI_PEI_SERVICES **PeiServices
|
|
)
|
|
{
|
|
PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
|
|
EFI_STATUS Status;
|
|
UINT8 Index;
|
|
UINTN ControllerType;
|
|
UINTN BaseAddress;
|
|
UINTN MemPages;
|
|
PEI_USB2_HC_DEV *EhcDev;
|
|
EFI_PHYSICAL_ADDRESS TempPtr;
|
|
|
|
//
|
|
// Shadow this PEIM to run from memory
|
|
//
|
|
if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
Status = PeiServicesLocatePpi (
|
|
&gPeiUsbControllerPpiGuid,
|
|
0,
|
|
NULL,
|
|
(VOID **) &ChipSetUsbControllerPpi
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
return EFI_UNSUPPORTED;
|
|
}
|
|
|
|
Index = 0;
|
|
while (TRUE) {
|
|
Status = ChipSetUsbControllerPpi->GetUsbController (
|
|
(EFI_PEI_SERVICES **) PeiServices,
|
|
ChipSetUsbControllerPpi,
|
|
Index,
|
|
&ControllerType,
|
|
&BaseAddress
|
|
);
|
|
//
|
|
// When status is error, meant no controller is found
|
|
//
|
|
if (EFI_ERROR (Status)) {
|
|
break;
|
|
}
|
|
|
|
//
|
|
// This PEIM is for UHC type controller.
|
|
//
|
|
if (ControllerType != PEI_EHCI_CONTROLLER) {
|
|
Index++;
|
|
continue;
|
|
}
|
|
|
|
MemPages = sizeof (PEI_USB2_HC_DEV) / PAGESIZE + 1;
|
|
Status = PeiServicesAllocatePages (
|
|
EfiBootServicesCode,
|
|
MemPages,
|
|
&TempPtr
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
return EFI_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
ZeroMem((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);
|
|
EhcDev = (PEI_USB2_HC_DEV *) ((UINTN) TempPtr);
|
|
|
|
EhcDev->Signature = USB2_HC_DEV_SIGNATURE;
|
|
|
|
EhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
|
|
|
|
|
|
EhcDev->HcStructParams = EhcReadCapRegister (EhcDev, EHC_HCSPARAMS_OFFSET);
|
|
EhcDev->HcCapParams = EhcReadCapRegister (EhcDev, EHC_HCCPARAMS_OFFSET);
|
|
EhcDev->CapLen = EhcReadCapRegister (EhcDev, EHC_CAPLENGTH_OFFSET) & 0x0FF;
|
|
//
|
|
// Initialize Uhc's hardware
|
|
//
|
|
Status = InitializeUsbHC (EhcDev);
|
|
if (EFI_ERROR (Status)) {
|
|
return Status;
|
|
}
|
|
|
|
EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;
|
|
EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;
|
|
EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;
|
|
EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;
|
|
EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;
|
|
EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
|
|
|
|
EhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
|
|
EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
|
|
EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;
|
|
|
|
Status = PeiServicesInstallPpi (&EhcDev->PpiDescriptor);
|
|
if (EFI_ERROR (Status)) {
|
|
Index++;
|
|
continue;
|
|
}
|
|
|
|
Index++;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
@param EhcDev EHCI Device.
|
|
|
|
@retval EFI_SUCCESS EHCI successfully initialized.
|
|
@retval EFI_ABORTED EHCI was failed to be initialized.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
InitializeUsbHC (
|
|
IN PEI_USB2_HC_DEV *EhcDev
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
|
|
|
|
EhcResetHC (EhcDev, EHC_RESET_TIMEOUT);
|
|
|
|
Status = EhcInitHC (EhcDev);
|
|
|
|
if (EFI_ERROR (Status)) {
|
|
return EFI_ABORTED;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|