mirror of https://github.com/acidanthera/audk.git
708 lines
17 KiB
C
708 lines
17 KiB
C
/** @file
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The UHCI register operation routines.
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Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "Uhci.h"
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/**
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Map address of request structure buffer.
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@param Uhc The UHCI device.
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@param Request The user request buffer.
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@param MappedAddr Mapped address of request.
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@param Map Identificaion of this mapping to return.
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@return EFI_SUCCESS Success.
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@return EFI_DEVICE_ERROR Fail to map the user request.
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**/
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EFI_STATUS
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UhciMapUserRequest (
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IN USB_HC_DEV *Uhc,
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IN OUT VOID *Request,
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OUT UINT8 **MappedAddr,
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OUT VOID **Map
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)
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{
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EFI_STATUS Status;
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UINTN Len;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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Len = sizeof (EFI_USB_DEVICE_REQUEST);
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Status = Uhc->PciIo->Map (
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Uhc->PciIo,
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EfiPciIoOperationBusMasterRead,
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Request,
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&Len,
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&PhyAddr,
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Map
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);
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if (!EFI_ERROR (Status)) {
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*MappedAddr = (UINT8 *) (UINTN) PhyAddr;
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}
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return Status;
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}
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/**
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Map address of user data buffer.
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@param Uhc The UHCI device.
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@param Direction Direction of the data transfer.
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@param Data The user data buffer.
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@param Len Length of the user data.
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@param PktId Packet identificaion.
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@param MappedAddr Mapped address to return.
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@param Map Identificaion of this mapping to return.
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@return EFI_SUCCESS Success.
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@return EFI_DEVICE_ERROR Fail to map the user data.
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**/
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EFI_STATUS
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UhciMapUserData (
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IN USB_HC_DEV *Uhc,
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IN EFI_USB_DATA_DIRECTION Direction,
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IN VOID *Data,
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IN OUT UINTN *Len,
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OUT UINT8 *PktId,
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OUT UINT8 **MappedAddr,
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OUT VOID **Map
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)
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{
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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Status = EFI_SUCCESS;
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switch (Direction) {
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case EfiUsbDataIn:
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//
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// BusMasterWrite means cpu read
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//
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*PktId = INPUT_PACKET_ID;
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Status = Uhc->PciIo->Map (
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Uhc->PciIo,
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EfiPciIoOperationBusMasterWrite,
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Data,
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Len,
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&PhyAddr,
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Map
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);
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if (EFI_ERROR (Status)) {
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goto EXIT;
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}
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*MappedAddr = (UINT8 *) (UINTN) PhyAddr;
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break;
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case EfiUsbDataOut:
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*PktId = OUTPUT_PACKET_ID;
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Status = Uhc->PciIo->Map (
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Uhc->PciIo,
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EfiPciIoOperationBusMasterRead,
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Data,
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Len,
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&PhyAddr,
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Map
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);
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if (EFI_ERROR (Status)) {
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goto EXIT;
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}
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*MappedAddr = (UINT8 *) (UINTN) PhyAddr;
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break;
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case EfiUsbNoData:
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if ((Len != NULL) && (*Len != 0)) {
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Status = EFI_INVALID_PARAMETER;
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goto EXIT;
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}
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*PktId = OUTPUT_PACKET_ID;
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*MappedAddr = NULL;
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*Map = NULL;
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break;
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default:
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Status = EFI_INVALID_PARAMETER;
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}
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EXIT:
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return Status;
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}
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/**
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Link the TD To QH.
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@param Uhc The UHCI device.
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@param Qh The queue head for the TD to link to.
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@param Td The TD to link.
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**/
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VOID
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UhciLinkTdToQh (
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IN USB_HC_DEV *Uhc,
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IN UHCI_QH_SW *Qh,
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IN UHCI_TD_SW *Td
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)
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{
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EFI_PHYSICAL_ADDRESS PhyAddr;
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PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Td, sizeof (UHCI_TD_HW));
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ASSERT ((Qh != NULL) && (Td != NULL));
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Qh->QhHw.VerticalLink = QH_VLINK (PhyAddr, FALSE);
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Qh->TDs = (VOID *) Td;
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}
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/**
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Unlink TD from the QH.
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@param Qh The queue head to unlink from.
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@param Td The TD to unlink.
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**/
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VOID
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UhciUnlinkTdFromQh (
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IN UHCI_QH_SW *Qh,
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IN UHCI_TD_SW *Td
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)
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{
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ASSERT ((Qh != NULL) && (Td != NULL));
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Qh->QhHw.VerticalLink = QH_VLINK (NULL, TRUE);
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Qh->TDs = NULL;
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}
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/**
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Append a new TD To the previous TD.
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@param Uhc The UHCI device.
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@param PrevTd Previous UHCI_TD_SW to be linked to.
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@param ThisTd TD to link.
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**/
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VOID
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UhciAppendTd (
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IN USB_HC_DEV *Uhc,
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IN UHCI_TD_SW *PrevTd,
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IN UHCI_TD_SW *ThisTd
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)
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{
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EFI_PHYSICAL_ADDRESS PhyAddr;
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PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, ThisTd, sizeof (UHCI_TD_HW));
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ASSERT ((PrevTd != NULL) && (ThisTd != NULL));
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PrevTd->TdHw.NextLink = TD_LINK (PhyAddr, TRUE, FALSE);
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PrevTd->NextTd = (VOID *) ThisTd;
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}
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/**
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Delete a list of TDs.
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@param Uhc The UHCI device.
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@param FirstTd TD link list head.
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@return None.
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**/
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VOID
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UhciDestoryTds (
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IN USB_HC_DEV *Uhc,
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IN UHCI_TD_SW *FirstTd
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)
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{
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UHCI_TD_SW *NextTd;
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UHCI_TD_SW *ThisTd;
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NextTd = FirstTd;
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while (NextTd != NULL) {
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ThisTd = NextTd;
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NextTd = ThisTd->NextTd;
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UsbHcFreeMem (Uhc->MemPool, ThisTd, sizeof (UHCI_TD_SW));
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}
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}
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/**
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Create an initialize a new queue head.
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@param Uhc The UHCI device.
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@param Interval The polling interval for the queue.
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@return The newly created queue header.
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**/
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UHCI_QH_SW *
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UhciCreateQh (
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IN USB_HC_DEV *Uhc,
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IN UINTN Interval
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)
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{
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UHCI_QH_SW *Qh;
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Qh = UsbHcAllocateMem (Uhc->MemPool, sizeof (UHCI_QH_SW));
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if (Qh == NULL) {
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return NULL;
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}
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Qh->QhHw.HorizonLink = QH_HLINK (NULL, TRUE);
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Qh->QhHw.VerticalLink = QH_VLINK (NULL, TRUE);
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Qh->Interval = UhciConvertPollRate(Interval);
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Qh->TDs = NULL;
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Qh->NextQh = NULL;
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return Qh;
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}
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/**
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Create and intialize a TD.
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@param Uhc The UHCI device.
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@return The newly allocated and initialized TD.
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**/
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UHCI_TD_SW *
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UhciCreateTd (
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IN USB_HC_DEV *Uhc
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)
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{
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UHCI_TD_SW *Td;
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Td = UsbHcAllocateMem (Uhc->MemPool, sizeof (UHCI_TD_SW));
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if (Td == NULL) {
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return NULL;
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}
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Td->TdHw.NextLink = TD_LINK (NULL, FALSE, TRUE);
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Td->NextTd = NULL;
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Td->Data = NULL;
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Td->DataLen = 0;
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return Td;
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}
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/**
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Create and initialize a TD for Setup Stage of a control transfer.
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@param Uhc The UHCI device.
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@param DevAddr Device address.
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@param Request A pointer to cpu memory address of Device request.
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@param RequestPhy A pointer to pci memory address of Device request.
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@param IsLow Full speed or low speed.
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@return The created setup Td Pointer.
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**/
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UHCI_TD_SW *
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UhciCreateSetupTd (
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IN USB_HC_DEV *Uhc,
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IN UINT8 DevAddr,
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IN UINT8 *Request,
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IN UINT8 *RequestPhy,
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IN BOOLEAN IsLow
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)
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{
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UHCI_TD_SW *Td;
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Td = UhciCreateTd (Uhc);
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if (Td == NULL) {
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return NULL;
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}
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Td->TdHw.NextLink = TD_LINK (NULL, TRUE, TRUE);
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Td->TdHw.ShortPacket = FALSE;
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Td->TdHw.IsIsoch = FALSE;
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Td->TdHw.IntOnCpl = FALSE;
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Td->TdHw.ErrorCount = 0x03;
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Td->TdHw.Status |= USBTD_ACTIVE;
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Td->TdHw.DataToggle = 0;
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Td->TdHw.EndPoint = 0;
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Td->TdHw.LowSpeed = IsLow ? 1 : 0;
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Td->TdHw.DeviceAddr = DevAddr & 0x7F;
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Td->TdHw.MaxPacketLen = (UINT32) (sizeof (EFI_USB_DEVICE_REQUEST) - 1);
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Td->TdHw.PidCode = SETUP_PACKET_ID;
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Td->TdHw.DataBuffer = (UINT32) (UINTN) RequestPhy;
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Td->Data = Request;
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Td->DataLen = (UINT16) sizeof (EFI_USB_DEVICE_REQUEST);
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return Td;
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}
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/**
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Create a TD for data.
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@param Uhc The UHCI device.
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@param DevAddr Device address.
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@param Endpoint Endpoint number.
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@param DataPtr A pointer to cpu memory address of Data buffer.
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@param DataPhyPtr A pointer to pci memory address of Data buffer.
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@param Len Data length.
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@param PktId Packet ID.
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@param Toggle Data toggle value.
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@param IsLow Full speed or low speed.
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@return Data Td pointer if success, otherwise NULL.
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**/
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UHCI_TD_SW *
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UhciCreateDataTd (
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IN USB_HC_DEV *Uhc,
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IN UINT8 DevAddr,
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IN UINT8 Endpoint,
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IN UINT8 *DataPtr,
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IN UINT8 *DataPhyPtr,
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IN UINTN Len,
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IN UINT8 PktId,
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IN UINT8 Toggle,
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IN BOOLEAN IsLow
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)
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{
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UHCI_TD_SW *Td;
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//
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// Code as length - 1, and the max valid length is 0x500
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//
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ASSERT (Len <= 0x500);
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Td = UhciCreateTd (Uhc);
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if (Td == NULL) {
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return NULL;
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}
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Td->TdHw.NextLink = TD_LINK (NULL, TRUE, TRUE);
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Td->TdHw.ShortPacket = FALSE;
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Td->TdHw.IsIsoch = FALSE;
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Td->TdHw.IntOnCpl = FALSE;
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Td->TdHw.ErrorCount = 0x03;
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Td->TdHw.Status = USBTD_ACTIVE;
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Td->TdHw.LowSpeed = IsLow ? 1 : 0;
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Td->TdHw.DataToggle = Toggle & 0x01;
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Td->TdHw.EndPoint = Endpoint & 0x0F;
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Td->TdHw.DeviceAddr = DevAddr & 0x7F;
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Td->TdHw.MaxPacketLen = (UINT32) (Len - 1);
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Td->TdHw.PidCode = (UINT8) PktId;
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Td->TdHw.DataBuffer = (UINT32) (UINTN) DataPhyPtr;
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Td->Data = DataPtr;
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Td->DataLen = (UINT16) Len;
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return Td;
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}
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/**
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Create TD for the Status Stage of control transfer.
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@param Uhc The UHCI device.
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@param DevAddr Device address.
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@param PktId Packet ID.
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@param IsLow Full speed or low speed.
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@return Status Td Pointer.
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**/
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UHCI_TD_SW *
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UhciCreateStatusTd (
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IN USB_HC_DEV *Uhc,
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IN UINT8 DevAddr,
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IN UINT8 PktId,
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IN BOOLEAN IsLow
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)
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{
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UHCI_TD_SW *Td;
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Td = UhciCreateTd (Uhc);
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if (Td == NULL) {
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return NULL;
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}
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Td->TdHw.NextLink = TD_LINK (NULL, TRUE, TRUE);
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Td->TdHw.ShortPacket = FALSE;
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Td->TdHw.IsIsoch = FALSE;
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Td->TdHw.IntOnCpl = FALSE;
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Td->TdHw.ErrorCount = 0x03;
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Td->TdHw.Status |= USBTD_ACTIVE;
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Td->TdHw.MaxPacketLen = 0x7FF; //0x7FF: there is no data (refer to UHCI spec)
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Td->TdHw.DataToggle = 1;
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Td->TdHw.EndPoint = 0;
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Td->TdHw.LowSpeed = IsLow ? 1 : 0;
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Td->TdHw.DeviceAddr = DevAddr & 0x7F;
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Td->TdHw.PidCode = (UINT8) PktId;
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Td->TdHw.DataBuffer = (UINT32) (UINTN) NULL;
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Td->Data = NULL;
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Td->DataLen = 0;
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return Td;
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}
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/**
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Create Tds list for Control Transfer.
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@param Uhc The UHCI device.
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@param DeviceAddr The device address.
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@param DataPktId Packet Identification of Data Tds.
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@param Request A pointer to cpu memory address of request structure buffer to transfer.
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@param RequestPhy A pointer to pci memory address of request structure buffer to transfer.
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@param Data A pointer to cpu memory address of user data buffer to transfer.
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@param DataPhy A pointer to pci memory address of user data buffer to transfer.
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@param DataLen Length of user data to transfer.
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@param MaxPacket Maximum packet size for control transfer.
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@param IsLow Full speed or low speed.
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@return The Td list head for the control transfer.
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**/
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UHCI_TD_SW *
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UhciCreateCtrlTds (
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IN USB_HC_DEV *Uhc,
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IN UINT8 DeviceAddr,
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IN UINT8 DataPktId,
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IN UINT8 *Request,
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IN UINT8 *RequestPhy,
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IN UINT8 *Data,
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IN UINT8 *DataPhy,
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IN UINTN DataLen,
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IN UINT8 MaxPacket,
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IN BOOLEAN IsLow
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)
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{
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UHCI_TD_SW *SetupTd;
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UHCI_TD_SW *FirstDataTd;
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UHCI_TD_SW *DataTd;
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UHCI_TD_SW *PrevDataTd;
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UHCI_TD_SW *StatusTd;
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UINT8 DataToggle;
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UINT8 StatusPktId;
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UINTN ThisTdLen;
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DataTd = NULL;
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SetupTd = NULL;
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FirstDataTd = NULL;
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PrevDataTd = NULL;
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StatusTd = NULL;
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//
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// Create setup packets for the transfer
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//
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SetupTd = UhciCreateSetupTd (Uhc, DeviceAddr, Request, RequestPhy, IsLow);
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if (SetupTd == NULL) {
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return NULL;
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}
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//
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// Create data packets for the transfer
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//
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DataToggle = 1;
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while (DataLen > 0) {
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//
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// PktSize is the data load size in each Td.
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//
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ThisTdLen = (DataLen > MaxPacket ? MaxPacket : DataLen);
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DataTd = UhciCreateDataTd (
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Uhc,
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DeviceAddr,
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0,
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Data, //cpu memory address
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DataPhy, //Pci memory address
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ThisTdLen,
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DataPktId,
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DataToggle,
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IsLow
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);
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if (DataTd == NULL) {
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goto FREE_TD;
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}
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if (FirstDataTd == NULL) {
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FirstDataTd = DataTd;
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FirstDataTd->NextTd = NULL;
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} else {
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UhciAppendTd (Uhc, PrevDataTd, DataTd);
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}
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DataToggle ^= 1;
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PrevDataTd = DataTd;
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Data += ThisTdLen;
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DataPhy += ThisTdLen;
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DataLen -= ThisTdLen;
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}
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//
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// Status packet is on the opposite direction to data packets
|
|
//
|
|
if (OUTPUT_PACKET_ID == DataPktId) {
|
|
StatusPktId = INPUT_PACKET_ID;
|
|
} else {
|
|
StatusPktId = OUTPUT_PACKET_ID;
|
|
}
|
|
|
|
StatusTd = UhciCreateStatusTd (Uhc, DeviceAddr, StatusPktId, IsLow);
|
|
|
|
if (StatusTd == NULL) {
|
|
goto FREE_TD;
|
|
}
|
|
|
|
//
|
|
// Link setup Td -> data Tds -> status Td together
|
|
//
|
|
if (FirstDataTd != NULL) {
|
|
UhciAppendTd (Uhc, SetupTd, FirstDataTd);
|
|
UhciAppendTd (Uhc, PrevDataTd, StatusTd);
|
|
} else {
|
|
UhciAppendTd (Uhc, SetupTd, StatusTd);
|
|
}
|
|
|
|
return SetupTd;
|
|
|
|
FREE_TD:
|
|
if (SetupTd != NULL) {
|
|
UhciDestoryTds (Uhc, SetupTd);
|
|
}
|
|
|
|
if (FirstDataTd != NULL) {
|
|
UhciDestoryTds (Uhc, FirstDataTd);
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
|
|
/**
|
|
Create Tds list for Bulk/Interrupt Transfer.
|
|
|
|
@param Uhc USB_HC_DEV.
|
|
@param DevAddr Address of Device.
|
|
@param EndPoint Endpoint Number.
|
|
@param PktId Packet Identification of Data Tds.
|
|
@param Data A pointer to cpu memory address of user data buffer to transfer.
|
|
@param DataPhy A pointer to pci memory address of user data buffer to transfer.
|
|
@param DataLen Length of user data to transfer.
|
|
@param DataToggle Data Toggle Pointer.
|
|
@param MaxPacket Maximum packet size for Bulk/Interrupt transfer.
|
|
@param IsLow Is Low Speed Device.
|
|
|
|
@return The Tds list head for the bulk transfer.
|
|
|
|
**/
|
|
UHCI_TD_SW *
|
|
UhciCreateBulkOrIntTds (
|
|
IN USB_HC_DEV *Uhc,
|
|
IN UINT8 DevAddr,
|
|
IN UINT8 EndPoint,
|
|
IN UINT8 PktId,
|
|
IN UINT8 *Data,
|
|
IN UINT8 *DataPhy,
|
|
IN UINTN DataLen,
|
|
IN OUT UINT8 *DataToggle,
|
|
IN UINT8 MaxPacket,
|
|
IN BOOLEAN IsLow
|
|
)
|
|
{
|
|
UHCI_TD_SW *DataTd;
|
|
UHCI_TD_SW *FirstDataTd;
|
|
UHCI_TD_SW *PrevDataTd;
|
|
UINTN ThisTdLen;
|
|
|
|
DataTd = NULL;
|
|
FirstDataTd = NULL;
|
|
PrevDataTd = NULL;
|
|
|
|
//
|
|
// Create data packets for the transfer
|
|
//
|
|
while (DataLen > 0) {
|
|
//
|
|
// PktSize is the data load size that each Td.
|
|
//
|
|
ThisTdLen = DataLen;
|
|
|
|
if (DataLen > MaxPacket) {
|
|
ThisTdLen = MaxPacket;
|
|
}
|
|
|
|
DataTd = UhciCreateDataTd (
|
|
Uhc,
|
|
DevAddr,
|
|
EndPoint,
|
|
Data,
|
|
DataPhy,
|
|
ThisTdLen,
|
|
PktId,
|
|
*DataToggle,
|
|
IsLow
|
|
);
|
|
|
|
if (DataTd == NULL) {
|
|
goto FREE_TD;
|
|
}
|
|
|
|
if (PktId == INPUT_PACKET_ID) {
|
|
DataTd->TdHw.ShortPacket = TRUE;
|
|
}
|
|
|
|
if (FirstDataTd == NULL) {
|
|
FirstDataTd = DataTd;
|
|
FirstDataTd->NextTd = NULL;
|
|
} else {
|
|
UhciAppendTd (Uhc, PrevDataTd, DataTd);
|
|
}
|
|
|
|
*DataToggle ^= 1;
|
|
PrevDataTd = DataTd;
|
|
Data += ThisTdLen;
|
|
DataPhy += ThisTdLen;
|
|
DataLen -= ThisTdLen;
|
|
}
|
|
|
|
return FirstDataTd;
|
|
|
|
FREE_TD:
|
|
if (FirstDataTd != NULL) {
|
|
UhciDestoryTds (Uhc, FirstDataTd);
|
|
}
|
|
|
|
return NULL;
|
|
}
|