mirror of https://github.com/acidanthera/audk.git
117 lines
4.1 KiB
Plaintext
117 lines
4.1 KiB
Plaintext
/** @file
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Quark South Cluster Devices.
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef QuarkSouthCluster_asi
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#define QuarkSouthCluster_asi
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Device (SDIO) // SDIO [Bus 0, Device 20, Function 0]
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{
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Name(_ADR,0x00140000) // Device (HI WORD)=20, Func (LO WORD)=0
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (URT0) // UART0 [Bus 0, Device 20, Function 1]
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{
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Name(_ADR,0x00140001) // Device (HI WORD)=20, Func (LO WORD)=1
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (USBD) // USB Device [Bus 0, Device 20, Function 2]
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{
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Name(_ADR,0x00140002) // Device (HI WORD)=20, Func (LO WORD)=2
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (EHCI) // EHCI [Bus 0, Device 20, Function 3]
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{
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Name(_ADR,0x00140003) // Device (HI WORD)=20, Func (LO WORD)=3
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (OHCI) // OHCI [Bus 0, Device 20, Function 4]
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{
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Name(_ADR,0x00140004) // Device (HI WORD)=20, Func (LO WORD)=4
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (URT1) // UART1 [Bus 0, Device 20, Function 5]
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{
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Name(_ADR,0x00140005) // Device (HI WORD)=20, Func (LO WORD)=5
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (ENT0) // Ethernet0 [Bus 0, Device 20, Function 6]
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{
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Name(_ADR,0x00140006) // Device (HI WORD)=20, Func (LO WORD)=6
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (ENT1) // Ethernet1 [Bus 0, Device 20, Function 7]
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{
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Name(_ADR,0x00140007) // Device (HI WORD)=20, Func (LO WORD)=7
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (SPI0) // SPI0 [Bus 0, Device 21, Function 0]
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{
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Name(_ADR,0x00150000) // Device (HI WORD)=21, Func (LO WORD)=0
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (SPI1) // SPI1 [Bus 0, Device 21, Function 1]
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{
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Name(_ADR,0x00150001) // Device (HI WORD)=21, Func (LO WORD)=1
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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}
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Device (GIP0) // I2C/GPIO [Bus 0, Device 21, Function 2]
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{
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Name(_ADR,0x00150002) // Device (HI WORD)=21, Func (LO WORD)=2
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Name(_STA,0xF) // Enabled, do Display
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Name(_PRW,Package(){0x0F,0x03}) // GPE pin 0x0F, Wake from S3 -- PCI PME#
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Device(GPO_) // GPIO Virtual Child Device- for BAR0 resources
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{
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Name(_ADR, 0)
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Name(_STA, 0xf)
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Name(_PRW, Package(0x2)
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{
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0xf,
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0x3
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})
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}
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Device(I2C_) // I2C Controller Virtual Child Device- for BAR1 resources
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{
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Name(_ADR, 1)
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Name(_STA, 0xf)
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Name(_PRW, Package(0x2)
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{
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0xf,
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0x3
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})
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}
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}
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#endif
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