mirror of https://github.com/acidanthera/audk.git
803 lines
25 KiB
C
803 lines
25 KiB
C
/** @file
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CPU Features Initialize functions.
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Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "RegisterCpuFeatures.h"
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/**
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Worker function to save PcdCpuFeaturesCapability.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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**/
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VOID
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SetCapabilityPcd (
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IN UINT8 *SupportedFeatureMask
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)
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{
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EFI_STATUS Status;
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UINTN BitMaskSize;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesCapability);
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Status = PcdSetPtrS (PcdCpuFeaturesCapability, &BitMaskSize, SupportedFeatureMask);
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ASSERT_EFI_ERROR (Status);
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}
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/**
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Worker function to save PcdCpuFeaturesSetting.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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**/
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VOID
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SetSettingPcd (
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IN UINT8 *SupportedFeatureMask
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)
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{
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EFI_STATUS Status;
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UINTN BitMaskSize;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesSetting);
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Status = PcdSetPtrS (PcdCpuFeaturesSetting, &BitMaskSize, SupportedFeatureMask);
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ASSERT_EFI_ERROR (Status);
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}
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/**
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Worker function to get PcdCpuFeaturesSupport.
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@return The pointer to CPU feature bits mask buffer.
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**/
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UINT8 *
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GetSupportPcd (
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VOID
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)
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{
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UINT8 *SupportBitMask;
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SupportBitMask = AllocateCopyPool (
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PcdGetSize (PcdCpuFeaturesSupport),
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PcdGetPtr (PcdCpuFeaturesSupport)
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);
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ASSERT (SupportBitMask != NULL);
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return SupportBitMask;
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}
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/**
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Worker function to get PcdCpuFeaturesUserConfiguration.
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@return The pointer to CPU feature bits mask buffer.
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**/
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UINT8 *
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GetConfigurationPcd (
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VOID
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)
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{
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UINT8 *SupportBitMask;
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SupportBitMask = AllocateCopyPool (
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PcdGetSize (PcdCpuFeaturesUserConfiguration),
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PcdGetPtr (PcdCpuFeaturesUserConfiguration)
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);
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ASSERT (SupportBitMask != NULL);
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return SupportBitMask;
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}
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/**
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Collects CPU type and feature information.
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@param[in, out] CpuInfo The pointer to CPU feature information
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**/
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VOID
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FillProcessorInfo (
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IN OUT REGISTER_CPU_FEATURE_INFORMATION *CpuInfo
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)
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{
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CPUID_VERSION_INFO_EAX Eax;
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CPUID_VERSION_INFO_ECX Ecx;
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CPUID_VERSION_INFO_EDX Edx;
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UINT32 DisplayedFamily;
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UINT32 DisplayedModel;
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AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, &Ecx.Uint32, &Edx.Uint32);
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DisplayedFamily = Eax.Bits.FamilyId;
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if (Eax.Bits.FamilyId == 0x0F) {
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DisplayedFamily |= (Eax.Bits.ExtendedFamilyId << 4);
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}
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DisplayedModel = Eax.Bits.Model;
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if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) {
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DisplayedModel |= (Eax.Bits.ExtendedModelId << 4);
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}
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CpuInfo->DisplayFamily = DisplayedFamily;
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CpuInfo->DisplayModel = DisplayedModel;
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CpuInfo->SteppingId = Eax.Bits.SteppingId;
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CpuInfo->ProcessorType = Eax.Bits.ProcessorType;
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CpuInfo->CpuIdVersionInfoEcx.Uint32 = Ecx.Uint32;
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CpuInfo->CpuIdVersionInfoEdx.Uint32 = Edx.Uint32;
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}
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/**
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Prepares for private data used for CPU features.
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@param[in] NumberOfCpus Number of processor in system
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**/
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VOID
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CpuInitDataInitialize (
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IN UINTN NumberOfCpus
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)
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{
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EFI_STATUS Status;
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UINTN ProcessorNumber;
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EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer;
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CPU_FEATURES_ENTRY *CpuFeature;
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CPU_FEATURES_INIT_ORDER *InitOrder;
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CPU_FEATURES_DATA *CpuFeaturesData;
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LIST_ENTRY *Entry;
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CpuFeaturesData = GetCpuFeaturesData ();
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CpuFeaturesData->InitOrder = AllocateZeroPool (sizeof (CPU_FEATURES_INIT_ORDER) * NumberOfCpus);
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ASSERT (CpuFeaturesData->InitOrder != NULL);
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//
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// Collect CPU Features information
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//
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Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
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while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
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CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
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ASSERT (CpuFeature->InitializeFunc != NULL);
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if (CpuFeature->GetConfigDataFunc != NULL) {
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CpuFeature->ConfigData = CpuFeature->GetConfigDataFunc (NumberOfCpus);
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}
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Entry = Entry->ForwardLink;
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}
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for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
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InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
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InitOrder->FeaturesSupportedMask = AllocateZeroPool (CpuFeaturesData->BitMaskSize);
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ASSERT (InitOrder->FeaturesSupportedMask != NULL);
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InitializeListHead (&InitOrder->OrderList);
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Status = GetProcessorInformation (ProcessorNumber, &ProcessorInfoBuffer);
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ASSERT_EFI_ERROR (Status);
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CopyMem (
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&InitOrder->CpuInfo.ProcessorInfo,
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&ProcessorInfoBuffer,
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sizeof (EFI_PROCESSOR_INFORMATION)
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);
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}
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//
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// Get support and configuration PCDs
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//
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CpuFeaturesData->SupportPcd = GetSupportPcd ();
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CpuFeaturesData->ConfigurationPcd = GetConfigurationPcd ();
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}
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/**
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Worker function to do OR operation on CPU feature supported bits mask buffer.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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@param[in] OrFeatureBitMask The feature bit mask to do OR operation
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**/
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VOID
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SupportedMaskOr (
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IN UINT8 *SupportedFeatureMask,
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IN UINT8 *OrFeatureBitMask
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)
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{
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UINTN Index;
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UINTN BitMaskSize;
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UINT8 *Data1;
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UINT8 *Data2;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
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Data1 = SupportedFeatureMask;
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Data2 = OrFeatureBitMask;
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for (Index = 0; Index < BitMaskSize; Index++) {
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*(Data1++) |= *(Data2++);
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}
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}
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/**
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Worker function to do AND operation on CPU feature supported bits mask buffer.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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@param[in] AndFeatureBitMask The feature bit mask to do AND operation
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**/
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VOID
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SupportedMaskAnd (
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IN UINT8 *SupportedFeatureMask,
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IN UINT8 *AndFeatureBitMask
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)
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{
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UINTN Index;
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UINTN BitMaskSize;
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UINT8 *Data1;
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UINT8 *Data2;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
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Data1 = SupportedFeatureMask;
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Data2 = AndFeatureBitMask;
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for (Index = 0; Index < BitMaskSize; Index++) {
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*(Data1++) &= *(Data2++);
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}
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}
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/**
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Worker function to clean bit operation on CPU feature supported bits mask buffer.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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@param[in] AndFeatureBitMask The feature bit mask to do XOR operation
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**/
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VOID
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SupportedMaskCleanBit (
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IN UINT8 *SupportedFeatureMask,
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IN UINT8 *AndFeatureBitMask
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)
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{
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UINTN Index;
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UINTN BitMaskSize;
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UINT8 *Data1;
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UINT8 *Data2;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
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Data1 = SupportedFeatureMask;
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Data2 = AndFeatureBitMask;
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for (Index = 0; Index < BitMaskSize; Index++) {
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*(Data1++) &= ~(*(Data2++));
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}
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}
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/**
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Worker function to check if the compared CPU feature set in the CPU feature
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supported bits mask buffer.
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@param[in] SupportedFeatureMask The pointer to CPU feature bits mask buffer
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@param[in] ComparedFeatureBitMask The feature bit mask to be compared
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@retval TRUE The ComparedFeatureBitMask is set in CPU feature supported bits
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mask buffer.
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@retval FALSE The ComparedFeatureBitMask is not set in CPU feature supported bits
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mask buffer.
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**/
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BOOLEAN
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IsBitMaskMatch (
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IN UINT8 *SupportedFeatureMask,
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IN UINT8 *ComparedFeatureBitMask
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)
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{
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UINTN Index;
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UINTN BitMaskSize;
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UINT8 *Data1;
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UINT8 *Data2;
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BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
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Data1 = SupportedFeatureMask;
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Data2 = ComparedFeatureBitMask;
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for (Index = 0; Index < BitMaskSize; Index++) {
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if (((*(Data1++)) & (*(Data2++))) != 0) {
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Collects processor data for calling processor.
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@param[in,out] Buffer The pointer to private data buffer.
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**/
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VOID
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EFIAPI
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CollectProcessorData (
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IN OUT VOID *Buffer
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)
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{
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UINTN ProcessorNumber;
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CPU_FEATURES_ENTRY *CpuFeature;
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REGISTER_CPU_FEATURE_INFORMATION *CpuInfo;
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LIST_ENTRY *Entry;
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CPU_FEATURES_DATA *CpuFeaturesData;
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CpuFeaturesData = GetCpuFeaturesData ();
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ProcessorNumber = GetProcessorIndex ();
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CpuInfo = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo;
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//
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// collect processor information
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//
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FillProcessorInfo (CpuInfo);
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Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
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while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
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CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
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if (IsBitMaskMatch (CpuFeaturesData->SupportPcd, CpuFeature->FeatureMask)) {
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if (CpuFeature->SupportFunc == NULL) {
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//
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// If SupportFunc is NULL, then the feature is supported.
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//
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SupportedMaskOr (
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CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMask,
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CpuFeature->FeatureMask
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);
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} else if (CpuFeature->SupportFunc (ProcessorNumber, CpuInfo, CpuFeature->ConfigData)) {
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SupportedMaskOr (
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CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMask,
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CpuFeature->FeatureMask
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);
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}
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}
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Entry = Entry->ForwardLink;
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}
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}
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/**
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Dump the contents of a CPU register table.
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@param[in] ProcessorNumber The index of the CPU to show the register table contents
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@note This service could be called by BSP only.
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**/
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VOID
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DumpRegisterTableOnProcessor (
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IN UINTN ProcessorNumber
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)
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{
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CPU_FEATURES_DATA *CpuFeaturesData;
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UINTN FeatureIndex;
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CPU_REGISTER_TABLE *RegisterTable;
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CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
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CPU_REGISTER_TABLE_ENTRY *RegisterTableEntryHead;
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UINT32 DebugPrintErrorLevel;
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DebugPrintErrorLevel = (ProcessorNumber == 0) ? DEBUG_INFO : DEBUG_VERBOSE;
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CpuFeaturesData = GetCpuFeaturesData ();
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//
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// Debug information
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//
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RegisterTable = &CpuFeaturesData->RegisterTable[ProcessorNumber];
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DEBUG ((DebugPrintErrorLevel, "RegisterTable->TableLength = %d\n", RegisterTable->TableLength));
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RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
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for (FeatureIndex = 0; FeatureIndex < RegisterTable->TableLength; FeatureIndex++) {
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RegisterTableEntry = &RegisterTableEntryHead[FeatureIndex];
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switch (RegisterTableEntry->RegisterType) {
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case Msr:
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DEBUG ((
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DebugPrintErrorLevel,
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"Processor: %d: MSR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
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ProcessorNumber,
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RegisterTableEntry->Index,
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RegisterTableEntry->ValidBitStart,
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RegisterTableEntry->ValidBitLength,
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RegisterTableEntry->Value
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));
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break;
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case ControlRegister:
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DEBUG ((
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DebugPrintErrorLevel,
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"Processor: %d: CR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
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ProcessorNumber,
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RegisterTableEntry->Index,
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RegisterTableEntry->ValidBitStart,
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RegisterTableEntry->ValidBitLength,
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RegisterTableEntry->Value
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));
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break;
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case MemoryMapped:
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DEBUG ((
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DebugPrintErrorLevel,
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"Processor: %d: MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
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ProcessorNumber,
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RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32),
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RegisterTableEntry->ValidBitStart,
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RegisterTableEntry->ValidBitLength,
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RegisterTableEntry->Value
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));
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break;
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case CacheControl:
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DEBUG ((
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DebugPrintErrorLevel,
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"Processor: %d: CACHE: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
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ProcessorNumber,
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RegisterTableEntry->Index,
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RegisterTableEntry->ValidBitStart,
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RegisterTableEntry->ValidBitLength,
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RegisterTableEntry->Value
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));
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break;
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default:
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break;
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}
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}
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}
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/**
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Analysis register CPU features on each processor and save CPU setting in CPU register table.
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@param[in] NumberOfCpus Number of processor in system
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**/
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VOID
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AnalysisProcessorFeatures (
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IN UINTN NumberOfCpus
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)
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{
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EFI_STATUS Status;
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UINTN ProcessorNumber;
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CPU_FEATURES_ENTRY *CpuFeature;
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CPU_FEATURES_ENTRY *CpuFeatureInOrder;
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CPU_FEATURES_INIT_ORDER *CpuInitOrder;
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REGISTER_CPU_FEATURE_INFORMATION *CpuInfo;
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LIST_ENTRY *Entry;
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CPU_FEATURES_DATA *CpuFeaturesData;
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CpuFeaturesData = GetCpuFeaturesData ();
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CpuFeaturesData->CapabilityPcd = AllocatePool (CpuFeaturesData->BitMaskSize);
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ASSERT (CpuFeaturesData->CapabilityPcd != NULL);
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SetMem (CpuFeaturesData->CapabilityPcd, CpuFeaturesData->BitMaskSize, 0xFF);
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for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
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CpuInitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
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//
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// Calculate the last capability on all processors
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//
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SupportedMaskAnd (CpuFeaturesData->CapabilityPcd, CpuInitOrder->FeaturesSupportedMask);
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}
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//
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// Calculate the last setting
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//
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CpuFeaturesData->SettingPcd = AllocateCopyPool (CpuFeaturesData->BitMaskSize, CpuFeaturesData->CapabilityPcd);
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ASSERT (CpuFeaturesData->SettingPcd != NULL);
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SupportedMaskAnd (CpuFeaturesData->SettingPcd, CpuFeaturesData->ConfigurationPcd);
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//
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// Save PCDs and display CPU PCDs
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//
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SetCapabilityPcd (CpuFeaturesData->CapabilityPcd);
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SetSettingPcd (CpuFeaturesData->SettingPcd);
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//
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// Dump the last CPU feature list
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//
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DEBUG_CODE (
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DEBUG ((DEBUG_INFO, "Last CPU features list...\n"));
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Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
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while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
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CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
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if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->CapabilityPcd)) {
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if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->SettingPcd)) {
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DEBUG ((DEBUG_INFO, "[Enable ] "));
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} else {
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DEBUG ((DEBUG_INFO, "[Disable ] "));
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}
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} else {
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DEBUG ((DEBUG_INFO, "[Unsupport] "));
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}
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DumpCpuFeature (CpuFeature);
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Entry = Entry->ForwardLink;
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}
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DEBUG ((DEBUG_INFO, "PcdCpuFeaturesSupport:\n"));
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DumpCpuFeatureMask (CpuFeaturesData->SupportPcd);
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DEBUG ((DEBUG_INFO, "PcdCpuFeaturesUserConfiguration:\n"));
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DumpCpuFeatureMask (CpuFeaturesData->ConfigurationPcd);
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DEBUG ((DEBUG_INFO, "PcdCpuFeaturesCapability:\n"));
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DumpCpuFeatureMask (CpuFeaturesData->CapabilityPcd);
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DEBUG ((DEBUG_INFO, "PcdCpuFeaturesSetting:\n"));
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DumpCpuFeatureMask (CpuFeaturesData->SettingPcd);
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);
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for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
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CpuInitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
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Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
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while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
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//
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// Insert each feature into processor's order list
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//
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CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
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if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->CapabilityPcd)) {
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CpuFeatureInOrder = AllocateCopyPool (sizeof (CPU_FEATURES_ENTRY), CpuFeature);
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ASSERT (CpuFeatureInOrder != NULL);
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InsertTailList (&CpuInitOrder->OrderList, &CpuFeatureInOrder->Link);
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}
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Entry = Entry->ForwardLink;
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}
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//
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// Go through ordered feature list to initialize CPU features
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//
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CpuInfo = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo;
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Entry = GetFirstNode (&CpuInitOrder->OrderList);
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while (!IsNull (&CpuInitOrder->OrderList, Entry)) {
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CpuFeatureInOrder = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
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if (IsBitMaskMatch (CpuFeatureInOrder->FeatureMask, CpuFeaturesData->SettingPcd)) {
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Status = CpuFeatureInOrder->InitializeFunc (ProcessorNumber, CpuInfo, CpuFeatureInOrder->ConfigData, TRUE);
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if (EFI_ERROR (Status)) {
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//
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// Clean the CpuFeatureInOrder->FeatureMask in setting PCD.
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//
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SupportedMaskCleanBit (CpuFeaturesData->SettingPcd, CpuFeatureInOrder->FeatureMask);
|
|
if (CpuFeatureInOrder->FeatureName != NULL) {
|
|
DEBUG ((DEBUG_WARN, "Warning :: Failed to enable Feature: Name = %a.\n", CpuFeatureInOrder->FeatureName));
|
|
} else {
|
|
DEBUG ((DEBUG_WARN, "Warning :: Failed to enable Feature: Mask = "));
|
|
DumpCpuFeatureMask (CpuFeatureInOrder->FeatureMask);
|
|
}
|
|
}
|
|
} else {
|
|
Status = CpuFeatureInOrder->InitializeFunc (ProcessorNumber, CpuInfo, CpuFeatureInOrder->ConfigData, FALSE);
|
|
if (EFI_ERROR (Status)) {
|
|
if (CpuFeatureInOrder->FeatureName != NULL) {
|
|
DEBUG ((DEBUG_WARN, "Warning :: Failed to disable Feature: Name = %a.\n", CpuFeatureInOrder->FeatureName));
|
|
} else {
|
|
DEBUG ((DEBUG_WARN, "Warning :: Failed to disable Feature: Mask = "));
|
|
DumpCpuFeatureMask (CpuFeatureInOrder->FeatureMask);
|
|
}
|
|
}
|
|
}
|
|
Entry = Entry->ForwardLink;
|
|
}
|
|
|
|
//
|
|
// Dump PcdCpuFeaturesSetting again because this value maybe updated
|
|
// again during initialize the features.
|
|
//
|
|
DEBUG ((DEBUG_INFO, "Dump final value for PcdCpuFeaturesSetting:\n"));
|
|
DumpCpuFeatureMask (CpuFeaturesData->SettingPcd);
|
|
|
|
//
|
|
// Dump the RegisterTable
|
|
//
|
|
DumpRegisterTableOnProcessor (ProcessorNumber);
|
|
}
|
|
}
|
|
|
|
/**
|
|
Initialize the CPU registers from a register table.
|
|
|
|
@param[in] ProcessorNumber The index of the CPU executing this function.
|
|
|
|
@note This service could be called by BSP/APs.
|
|
**/
|
|
VOID
|
|
ProgramProcessorRegister (
|
|
IN UINTN ProcessorNumber
|
|
)
|
|
{
|
|
CPU_FEATURES_DATA *CpuFeaturesData;
|
|
CPU_REGISTER_TABLE *RegisterTable;
|
|
CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
|
|
UINTN Index;
|
|
UINTN Value;
|
|
CPU_REGISTER_TABLE_ENTRY *RegisterTableEntryHead;
|
|
|
|
CpuFeaturesData = GetCpuFeaturesData ();
|
|
RegisterTable = &CpuFeaturesData->RegisterTable[ProcessorNumber];
|
|
|
|
//
|
|
// Traverse Register Table of this logical processor
|
|
//
|
|
RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
|
|
|
|
for (Index = 0; Index < RegisterTable->TableLength; Index++) {
|
|
|
|
RegisterTableEntry = &RegisterTableEntryHead[Index];
|
|
|
|
//
|
|
// Check the type of specified register
|
|
//
|
|
switch (RegisterTableEntry->RegisterType) {
|
|
//
|
|
// The specified register is Control Register
|
|
//
|
|
case ControlRegister:
|
|
switch (RegisterTableEntry->Index) {
|
|
case 0:
|
|
Value = AsmReadCr0 ();
|
|
Value = (UINTN) BitFieldWrite64 (
|
|
Value,
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
RegisterTableEntry->Value
|
|
);
|
|
AsmWriteCr0 (Value);
|
|
break;
|
|
case 2:
|
|
Value = AsmReadCr2 ();
|
|
Value = (UINTN) BitFieldWrite64 (
|
|
Value,
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
RegisterTableEntry->Value
|
|
);
|
|
AsmWriteCr2 (Value);
|
|
break;
|
|
case 3:
|
|
Value = AsmReadCr3 ();
|
|
Value = (UINTN) BitFieldWrite64 (
|
|
Value,
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
RegisterTableEntry->Value
|
|
);
|
|
AsmWriteCr3 (Value);
|
|
break;
|
|
case 4:
|
|
Value = AsmReadCr4 ();
|
|
Value = (UINTN) BitFieldWrite64 (
|
|
Value,
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
RegisterTableEntry->Value
|
|
);
|
|
AsmWriteCr4 (Value);
|
|
break;
|
|
case 8:
|
|
//
|
|
// Do we need to support CR8?
|
|
//
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
//
|
|
// The specified register is Model Specific Register
|
|
//
|
|
case Msr:
|
|
//
|
|
// Get lock to avoid Package/Core scope MSRs programming issue in parallel execution mode
|
|
//
|
|
AcquireSpinLock (&CpuFeaturesData->MsrLock);
|
|
if (RegisterTableEntry->ValidBitLength >= 64) {
|
|
//
|
|
// If length is not less than 64 bits, then directly write without reading
|
|
//
|
|
AsmWriteMsr64 (
|
|
RegisterTableEntry->Index,
|
|
RegisterTableEntry->Value
|
|
);
|
|
} else {
|
|
//
|
|
// Set the bit section according to bit start and length
|
|
//
|
|
AsmMsrBitFieldWrite64 (
|
|
RegisterTableEntry->Index,
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
RegisterTableEntry->Value
|
|
);
|
|
}
|
|
ReleaseSpinLock (&CpuFeaturesData->MsrLock);
|
|
break;
|
|
//
|
|
// MemoryMapped operations
|
|
//
|
|
case MemoryMapped:
|
|
AcquireSpinLock (&CpuFeaturesData->MemoryMappedLock);
|
|
MmioBitFieldWrite32 (
|
|
(UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)),
|
|
RegisterTableEntry->ValidBitStart,
|
|
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
|
|
(UINT32)RegisterTableEntry->Value
|
|
);
|
|
ReleaseSpinLock (&CpuFeaturesData->MemoryMappedLock);
|
|
break;
|
|
//
|
|
// Enable or disable cache
|
|
//
|
|
case CacheControl:
|
|
//
|
|
// If value of the entry is 0, then disable cache. Otherwise, enable cache.
|
|
//
|
|
if (RegisterTableEntry->Value == 0) {
|
|
AsmDisableCache ();
|
|
} else {
|
|
AsmEnableCache ();
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
Programs registers for the calling processor.
|
|
|
|
@param[in,out] Buffer The pointer to private data buffer.
|
|
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
SetProcessorRegister (
|
|
IN OUT VOID *Buffer
|
|
)
|
|
{
|
|
UINTN ProcessorNumber;
|
|
|
|
ProcessorNumber = GetProcessorIndex ();
|
|
ProgramProcessorRegister (ProcessorNumber);
|
|
}
|
|
|
|
/**
|
|
Performs CPU features detection.
|
|
|
|
This service will invoke MP service to check CPU features'
|
|
capabilities on BSP/APs.
|
|
|
|
@note This service could be called by BSP only.
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuFeaturesDetect (
|
|
VOID
|
|
)
|
|
{
|
|
UINTN NumberOfCpus;
|
|
UINTN NumberOfEnabledProcessors;
|
|
|
|
GetNumberOfProcessor (&NumberOfCpus, &NumberOfEnabledProcessors);
|
|
|
|
CpuInitDataInitialize (NumberOfCpus);
|
|
|
|
//
|
|
// Wakeup all APs for data collection.
|
|
//
|
|
StartupAPsWorker (CollectProcessorData);
|
|
|
|
//
|
|
// Collect data on BSP
|
|
//
|
|
CollectProcessorData (NULL);
|
|
|
|
AnalysisProcessorFeatures (NumberOfCpus);
|
|
}
|
|
|
|
/**
|
|
Performs CPU features Initialization.
|
|
|
|
This service will invoke MP service to perform CPU features
|
|
initialization on BSP/APs per user configuration.
|
|
|
|
@note This service could be called by BSP only.
|
|
**/
|
|
VOID
|
|
EFIAPI
|
|
CpuFeaturesInitialize (
|
|
VOID
|
|
)
|
|
{
|
|
CPU_FEATURES_DATA *CpuFeaturesData;
|
|
UINTN OldBspNumber;
|
|
|
|
CpuFeaturesData = GetCpuFeaturesData ();
|
|
|
|
OldBspNumber = GetProcessorIndex();
|
|
CpuFeaturesData->BspNumber = OldBspNumber;
|
|
//
|
|
// Wakeup all APs for programming.
|
|
//
|
|
StartupAPsWorker (SetProcessorRegister);
|
|
//
|
|
// Programming BSP
|
|
//
|
|
SetProcessorRegister (NULL);
|
|
//
|
|
// Switch to new BSP if required
|
|
//
|
|
if (CpuFeaturesData->BspNumber != OldBspNumber) {
|
|
SwitchNewBsp (CpuFeaturesData->BspNumber);
|
|
}
|
|
}
|