mirror of https://github.com/acidanthera/audk.git
74 lines
3.1 KiB
C
74 lines
3.1 KiB
C
/** @file
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Support for the latest PCI standard.
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Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PCIEXPRESS21_H_
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#define _PCIEXPRESS21_H_
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#define EFI_PCIE_CAPABILITY_BASE_OFFSET 0x100
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL_ARI_HIERARCHY 0x10
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#define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET 0x24
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#define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING 0x20
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#define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET 0x28
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#define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING 0x20
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//
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// for SR-IOV
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//
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#define EFI_PCIE_CAPABILITY_ID_ARI 0x0E
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#define EFI_PCIE_CAPABILITY_ID_ATS 0x0F
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#define EFI_PCIE_CAPABILITY_ID_SRIOV 0x10
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#define EFI_PCIE_CAPABILITY_ID_MRIOV 0x11
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typedef struct {
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UINT32 CapabilityHeader;
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UINT32 Capability;
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UINT16 Control;
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UINT16 Status;
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UINT16 InitialVFs;
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UINT16 TotalVFs;
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UINT16 NumVFs;
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UINT8 FunctionDependencyLink;
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UINT8 Reserved0;
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UINT16 FirstVFOffset;
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UINT16 VFStride;
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UINT16 Reserved1;
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UINT16 VFDeviceID;
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UINT32 SupportedPageSize;
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UINT32 SystemPageSize;
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UINT32 VFBar[6];
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UINT32 VFMigrationStateArrayOffset;
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} SR_IOV_CAPABILITY_REGISTER;
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_CAPABILITIES 0x04
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL 0x08
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_STATUS 0x0A
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_INITIALVFS 0x0C
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_TOTALVFS 0x0E
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_NUMVFS 0x10
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_FUNCTION_DEPENDENCY_LINK 0x12
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_FIRSTVF 0x14
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_VFSTRIDE 0x16
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_VFDEVICEID 0x1A
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_SUPPORTED_PAGE_SIZE 0x1C
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_SYSTEM_PAGE_SIZE 0x20
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0 0x24
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR1 0x28
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR2 0x2C
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR3 0x30
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR4 0x34
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR5 0x38
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#define EFI_PCIE_CAPABILITY_ID_SRIOV_VF_MIGRATION_STATE 0x3C
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#endif
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