mirror of https://github.com/acidanthera/audk.git
89f7ed8b29
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631 Current CPU feature initialization design: During normal boot, CpuFeaturesPei module (inside FSP) initializes the CPU features. During S3 boot, CpuFeaturesPei module does nothing, and CpuSmm driver (in SMRAM) initializes CPU features instead. This code change prevents CpuSmm driver from re-initializing CPU features during S3 resume if CpuFeaturesPei module has done the same initialization. In addition, EDK2 contains DxeIpl PEIM that calls S3RestoreConfig2 PPI during S3 boot and this PPI eventually calls CpuSmm driver (in SMRAM) to initialize the CPU features, so "EDK2 + FSP" does not have the CPU feature initialization issue during S3 boot. But "coreboot" does not contain DxeIpl PEIM and the issue appears, unless "PcdCpuFeaturesInitOnS3Resume" is set to TRUE. Signed-off-by: Jason Lou <yun.lou@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> |
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|---|---|---|
| .. | ||
| Application/Cpuid | ||
| CpuDxe | ||
| CpuFeatures | ||
| CpuIo2Dxe | ||
| CpuIo2Smm | ||
| CpuIoPei | ||
| CpuMpPei | ||
| CpuS3DataDxe | ||
| Include | ||
| Library | ||
| PiSmmCommunication | ||
| PiSmmCpuDxeSmm | ||
| ResetVector | ||
| SecCore | ||
| SecMigrationPei | ||
| Test | ||
| Universal/Acpi/S3Resume2Pei | ||
| UefiCpuPkg.ci.yaml | ||
| UefiCpuPkg.dec | ||
| UefiCpuPkg.dsc | ||
| UefiCpuPkg.uni | ||
| UefiCpuPkgExtra.uni | ||