mirror of https://github.com/acidanthera/audk.git
950 lines
30 KiB
NASM
950 lines
30 KiB
NASM
TITLE CpuInterrupt.asm:
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;------------------------------------------------------------------------------
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;*
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;* Copyright 2006, Intel Corporation
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;* All rights reserved. This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;* CpuInterrupt.asm
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;*
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;* Abstract:
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;*
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;------------------------------------------------------------------------------
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EXTERNDEF mExceptionCodeSize:DWORD
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.code
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EXTERN TimerHandler: FAR
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EXTERN ExceptionHandler: NEAR
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EXTERN mTimerVector: QWORD
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mExceptionCodeSize DD 9
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InitDescriptor PROC
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lea rax, [GDT_BASE] ; RAX=PHYSICAL address of gdt
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mov qword ptr [gdtr + 2], rax ; Put address of gdt into the gdtr
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lgdt fword ptr [gdtr]
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mov rax, 18h
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mov gs, rax
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mov fs, rax
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lea rax, [IDT_BASE] ; RAX=PHYSICAL address of idt
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mov qword ptr [idtr + 2], rax ; Put address of idt into the idtr
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lidt fword ptr [idtr]
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ret
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InitDescriptor ENDP
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; VOID
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; InstallInterruptHandler (
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; UINTN Vector, // rcx
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; void (*Handler)(void) // rdx
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; )
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InstallInterruptHandler PROC
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push rbx
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pushfq ; save eflags
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cli ; turn off interrupts
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sub rsp, 10h ; open some space on the stack
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mov rbx, rsp
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sidt [rbx] ; get fword address of IDT
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mov rbx, [rbx+2] ; move offset of IDT into RBX
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add rsp, 10h ; correct stack
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mov rax, rcx ; Get vector number
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shl rax, 4 ; multiply by 16 to get offset
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add rbx, rax ; add to IDT base to get entry
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mov rax, rdx ; load new address into IDT entry
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mov word ptr [rbx], ax ; write bits 15..0 of offset
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shr rax, 16 ; use ax to copy 31..16 to descriptors
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mov word ptr [rbx+6], ax ; write bits 31..16 of offset
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shr rax, 16 ; use eax to copy 63..32 to descriptors
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mov dword ptr [rbx+8], eax ; write bits 63..32 of offset
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popfq ; restore flags (possible enabling interrupts)
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pop rbx
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ret
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InstallInterruptHandler ENDP
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JmpCommonIdtEntry macro
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; jmp commonIdtEntry - this must be hand coded to keep the assembler from
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; using a 8 bit reletive jump when the entries are
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; within 255 bytes of the common entry. This must
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; be done to maintain the consistency of the size
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; of entry points...
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db 0e9h ; jmp 16 bit reletive
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dd commonIdtEntry - $ - 4 ; offset to jump to
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endm
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align 02h
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SystemExceptionHandler PROC
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INT0:
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push 0h ; push error code place holder on the stack
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push 0h
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JmpCommonIdtEntry
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; db 0e9h ; jmp 16 bit reletive
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; dd commonIdtEntry - $ - 4 ; offset to jump to
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INT1:
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push 0h ; push error code place holder on the stack
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push 1h
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JmpCommonIdtEntry
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INT2:
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push 0h ; push error code place holder on the stack
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push 2h
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JmpCommonIdtEntry
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INT3:
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push 0h ; push error code place holder on the stack
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push 3h
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JmpCommonIdtEntry
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INT4:
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push 0h ; push error code place holder on the stack
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push 4h
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JmpCommonIdtEntry
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INT5:
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push 0h ; push error code place holder on the stack
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push 5h
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JmpCommonIdtEntry
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INT6:
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push 0h ; push error code place holder on the stack
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push 6h
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JmpCommonIdtEntry
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INT7:
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push 0h ; push error code place holder on the stack
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push 7h
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JmpCommonIdtEntry
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INT8:
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; Double fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 8h
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JmpCommonIdtEntry
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INT9:
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push 0h ; push error code place holder on the stack
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push 9h
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JmpCommonIdtEntry
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INT10:
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; Invalid TSS causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 10
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JmpCommonIdtEntry
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INT11:
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; Segment Not Present causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 11
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JmpCommonIdtEntry
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INT12:
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; Stack fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 12
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JmpCommonIdtEntry
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INT13:
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; GP fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 13
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JmpCommonIdtEntry
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INT14:
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; Page fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 14
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JmpCommonIdtEntry
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INT15:
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push 0h ; push error code place holder on the stack
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push 15
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JmpCommonIdtEntry
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INT16:
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push 0h ; push error code place holder on the stack
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push 16
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JmpCommonIdtEntry
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INT17:
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; Alignment check causes an error code to be pushed so no phony push necessary
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nop
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nop
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push 17
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JmpCommonIdtEntry
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INT18:
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push 0h ; push error code place holder on the stack
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push 18
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JmpCommonIdtEntry
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INT19:
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push 0h ; push error code place holder on the stack
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push 19
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JmpCommonIdtEntry
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INTUnknown:
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REPEAT (32 - 20)
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push 0h ; push error code place holder on the stack
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; push xxh ; push vector number
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db 06ah
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db ( $ - INTUnknown - 3 ) / 9 + 20 ; vector number
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JmpCommonIdtEntry
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ENDM
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SystemExceptionHandler ENDP
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SystemTimerHandler PROC
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push 0
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push mTimerVector
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JmpCommonIdtEntry
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SystemTimerHandler ENDP
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commonIdtEntry:
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; +---------------------+ <-- 16-byte aligned ensured by processor
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; + Old SS +
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; +---------------------+
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; + Old RSP +
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; +---------------------+
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; + RFlags +
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; +---------------------+
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; + CS +
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; +---------------------+
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; + RIP +
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; +---------------------+
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; + Error Code +
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; +---------------------+
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; + Vector Number +
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; +---------------------+
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; + RBP +
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; +---------------------+ <-- RBP, 16-byte aligned
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cli
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push rbp
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mov rbp, rsp
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;
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; Since here the stack pointer is 16-byte aligned, so
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; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
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; is 16-byte aligned
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;
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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push r15
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push r14
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push r13
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push r12
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push r11
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push r10
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push r9
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push r8
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push rax
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push rcx
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push rdx
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push rbx
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push qword ptr [rbp + 6 * 8] ; RSP
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push qword ptr [rbp] ; RBP
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push rsi
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push rdi
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
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movzx rax, word ptr [rbp + 7 * 8]
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push rax ; for ss
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movzx rax, word ptr [rbp + 4 * 8]
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push rax ; for cs
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mov rax, ds
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push rax
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mov rax, es
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push rax
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mov rax, fs
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push rax
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mov rax, gs
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push rax
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;; UINT64 Rip;
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push qword ptr [rbp + 3 * 8]
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;; UINT64 Gdtr[2], Idtr[2];
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sub rsp, 16
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sidt fword ptr [rsp]
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sub rsp, 16
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sgdt fword ptr [rsp]
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;; UINT64 Ldtr, Tr;
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xor rax, rax
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str ax
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push rax
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sldt ax
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push rax
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;; UINT64 RFlags;
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push qword ptr [rbp + 5 * 8]
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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mov rax, cr8
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push rax
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mov rax, cr4
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or rax, 208h
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mov cr4, rax
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push rax
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mov rax, cr3
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push rax
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mov rax, cr2
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push rax
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xor rax, rax
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push rax
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mov rax, cr0
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push rax
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov rax, dr7
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push rax
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;; clear Dr7 while executing debugger itself
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xor rax, rax
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mov dr7, rax
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mov rax, dr6
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push rax
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;; insure all status bits in dr6 are clear...
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xor rax, rax
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mov dr6, rax
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mov rax, dr3
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push rax
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mov rax, dr2
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push rax
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mov rax, dr1
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push rax
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mov rax, dr0
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push rax
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;; FX_SAVE_STATE_X64 FxSaveState;
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sub rsp, 512
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mov rdi, rsp
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db 0fh, 0aeh, 00000111y ;fxsave [rdi]
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;; UINT32 ExceptionData;
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push qword ptr [rbp + 2 * 8]
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;; call into exception handler
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;; Prepare parameter and call
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mov rcx, qword ptr [rbp + 1 * 8]
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mov rdx, rsp
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;
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; Per X64 calling convention, allocate maximum parameter stack space
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; and make sure RSP is 16-byte aligned
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;
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sub rsp, 4 * 8 + 8
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cmp rcx, 32
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jb CallException
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call TimerHandler
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jmp ExceptionDone
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CallException:
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call ExceptionHandler
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ExceptionDone:
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add rsp, 4 * 8 + 8
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cli
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;; UINT64 ExceptionData;
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add rsp, 8
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;; FX_SAVE_STATE_X64 FxSaveState;
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mov rsi, rsp
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db 0fh, 0aeh, 00001110y ; fxrstor [rsi]
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add rsp, 512
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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pop rax
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mov dr0, rax
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pop rax
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mov dr1, rax
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pop rax
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mov dr2, rax
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pop rax
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mov dr3, rax
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;; skip restore of dr6. We cleared dr6 during the context save.
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add rsp, 8
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pop rax
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mov dr7, rax
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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pop rax
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mov cr0, rax
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add rsp, 8 ; not for Cr1
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pop rax
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mov cr2, rax
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pop rax
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mov cr3, rax
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pop rax
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mov cr4, rax
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pop rax
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mov cr8, rax
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;; UINT64 RFlags;
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pop qword ptr [rbp + 5 * 8]
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;; UINT64 Ldtr, Tr;
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;; UINT64 Gdtr[2], Idtr[2];
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;; Best not let anyone mess with these particular registers...
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add rsp, 48
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;; UINT64 Rip;
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pop qword ptr [rbp + 3 * 8]
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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pop rax
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; mov gs, rax ; not for gs
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pop rax
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; mov fs, rax ; not for fs
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; (X64 will not use fs and gs, so we do not restore it)
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pop rax
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mov es, rax
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pop rax
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mov ds, rax
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pop qword ptr [rbp + 4 * 8] ; for cs
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pop qword ptr [rbp + 7 * 8] ; for ss
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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pop rdi
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pop rsi
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add rsp, 8 ; not for rbp
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pop qword ptr [rbp + 6 * 8] ; for rsp
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pop rbx
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pop rdx
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pop rcx
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pop rax
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pop r8
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pop r9
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pop r10
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pop r11
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pop r12
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pop r13
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pop r14
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pop r15
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mov rsp, rbp
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pop rbp
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add rsp, 16
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iretq
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; data
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 010h
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gdtr dw GDT_END - GDT_BASE - 1 ; GDT limit
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dq 0 ; (GDT base gets set above)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; global descriptor table (GDT)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 010h
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public GDT_BASE
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GDT_BASE:
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; null descriptor
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NULL_SEL equ $-GDT_BASE ; Selector [0x0]
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dw 0 ; limit 15:0
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dw 0 ; base 15:0
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db 0 ; base 23:16
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db 0 ; type
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db 0 ; limit 19:16, flags
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db 0 ; base 31:24
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; linear data segment descriptor
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LINEAR_SEL equ $-GDT_BASE ; Selector [0x8]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 092h ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; linear code segment descriptor
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LINEAR_CODE_SEL equ $-GDT_BASE ; Selector [0x10]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 09Ah ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; system data segment descriptor
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SYS_DATA_SEL equ $-GDT_BASE ; Selector [0x18]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 092h ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; system code segment descriptor
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SYS_CODE_SEL equ $-GDT_BASE ; Selector [0x20]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 09Ah ; present, ring 0, data, expand-up, writable
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db 0CFh ; page-granular, 32-bit
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db 0
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; spare segment descriptor
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SPARE3_SEL equ $-GDT_BASE ; Selector [0x28]
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dw 0 ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 0 ; present, ring 0, data, expand-up, writable
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db 0 ; page-granular, 32-bit
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db 0
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;
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; system data segment descriptor
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;
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SYS_DATA64_SEL equ $-GDT_BASE ; Selector [0x30]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 092h ; P | DPL [1..2] | 1 | 1 | C | R | A
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db 0CFh ; G | D | L | AVL | Segment [19..16]
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db 0
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;
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; system code segment descriptor
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;
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SYS_CODE64_SEL equ $-GDT_BASE ; Selector [0x38]
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dw 0FFFFh ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 09Ah ; P | DPL [1..2] | 1 | 1 | C | R | A
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db 0AFh ; G | D | L | AVL | Segment [19..16]
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db 0
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; spare segment descriptor
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SPARE4_SEL equ $-GDT_BASE ; Selector [0x40]
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dw 0 ; limit 0xFFFFF
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dw 0 ; base 0
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db 0
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db 0 ; present, ring 0, data, expand-up, writable
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db 0 ; page-granular, 32-bit
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db 0
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GDT_END:
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align 02h
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idtr dw IDT_END - IDT_BASE - 1 ; IDT limit
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dq 0 ; (IDT base gets set above)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; interrupt descriptor table (IDT)
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;
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; Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
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; mappings. This implementation only uses the system timer and all other
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; IRQs will remain masked. The descriptors for vectors 33+ are provided
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; for convenience.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;idt_tag db "IDT",0
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align 02h
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public IDT_BASE
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IDT_BASE:
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; divide by zero (INT 0)
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DIV_ZERO_SEL equ $-IDT_BASE
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dw 0 ; offset 15:0
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dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; debug exception (INT 1)
|
|
DEBUG_EXCEPT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; NMI (INT 2)
|
|
NMI_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; soft breakpoint (INT 3)
|
|
BREAKPOINT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; overflow (INT 4)
|
|
OVERFLOW_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; bounds check (INT 5)
|
|
BOUNDS_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; invalid opcode (INT 6)
|
|
INVALID_OPCODE_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; device not available (INT 7)
|
|
DEV_NOT_AVAIL_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; double fault (INT 8)
|
|
DOUBLE_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; Coprocessor segment overrun - reserved (INT 9)
|
|
RSVD_INTR_SEL1 equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; invalid TSS (INT 0ah)
|
|
INVALID_TSS_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; segment not present (INT 0bh)
|
|
SEG_NOT_PRESENT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; stack fault (INT 0ch)
|
|
STACK_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; general protection (INT 0dh)
|
|
GP_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; page fault (INT 0eh)
|
|
PAGE_FAULT_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; Intel reserved - do not use (INT 0fh)
|
|
RSVD_INTR_SEL2 equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; floating point error (INT 10h)
|
|
FLT_POINT_ERR_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; alignment check (INT 11h)
|
|
ALIGNMENT_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; machine check (INT 12h)
|
|
MACHINE_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; SIMD floating-point exception (INT 13h)
|
|
SIMD_EXCEPTION_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
REPEAT (32 - 20)
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
ENDM
|
|
|
|
; 72 unspecified descriptors
|
|
db (72 * 16) dup(0)
|
|
|
|
; IRQ 0 (System timer) - (INT 68h)
|
|
IRQ0_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
IRQ1_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
IRQ2_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 3 (COM 2) - (INT 6bh)
|
|
IRQ3_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 4 (COM 1) - (INT 6ch)
|
|
IRQ4_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 5 (LPT 2) - (INT 6dh)
|
|
IRQ5_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 6 (Floppy controller) - (INT 6eh)
|
|
IRQ6_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 7 (LPT 1) - (INT 6fh)
|
|
IRQ7_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 8 (RTC Alarm) - (INT 70h)
|
|
IRQ8_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 9 - (INT 71h)
|
|
IRQ9_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 10 - (INT 72h)
|
|
IRQ10_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 11 - (INT 73h)
|
|
IRQ11_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
IRQ12_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 13 (Floating point error) - (INT 75h)
|
|
IRQ13_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 14 (Secondary IDE) - (INT 76h)
|
|
IRQ14_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
; IRQ 15 (Primary IDE) - (INT 77h)
|
|
IRQ15_SEL equ $-IDT_BASE
|
|
dw 0 ; offset 15:0
|
|
dw SYS_CODE64_SEL ; selector 15:0
|
|
db 0 ; 0 for interrupt gate
|
|
db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
|
|
dw 0 ; offset 31:16
|
|
dd 0 ; offset 63:32
|
|
dd 0 ; 0 for reserved
|
|
|
|
db (1 * 16) dup(0)
|
|
|
|
IDT_END:
|
|
|
|
align 02h
|
|
|
|
END
|