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TPM2 hardware may support PTP FIFO/TIS interface or PTP CRB interface. The original ACPI table only handles PTP FIFO/TIS interface. This patch adds PTP CRB interface support. The current logic is that SMM driver will runtime detect TPM device interface (CRB or FIFO/TIS) and publish TPM2 table based on result. It is compatible for old TPM2 FIFO/TIS device and new TPM2 CRB device. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19741 6f19259b-4bc3-4df7-8a09-765794883524
91 lines
2.7 KiB
C
91 lines
2.7 KiB
C
/** @file
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The header file for Tcg2 SMM driver.
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __TCG2_SMM_H__
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#define __TCG2_SMM_H__
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#include <PiDxe.h>
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#include <IndustryStandard/Acpi.h>
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#include <IndustryStandard/Tpm2Acpi.h>
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#include <Guid/MemoryOverwriteControl.h>
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#include <Guid/TpmInstance.h>
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#include <Protocol/SmmSwDispatch2.h>
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#include <Protocol/AcpiTable.h>
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#include <Protocol/SmmVariable.h>
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#include <Protocol/Tcg2Protocol.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/SmmServicesTableLib.h>
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#include <Library/UefiDriverEntryPoint.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DxeServicesLib.h>
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#include <Library/TpmMeasurementLib.h>
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#include <Library/Tpm2DeviceLib.h>
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#include <Library/Tcg2PhysicalPresenceLib.h>
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#include <Library/IoLib.h>
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#include <IndustryStandard/TpmPtp.h>
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#pragma pack(1)
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typedef struct {
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UINT8 SoftwareSmi;
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UINT32 Parameter;
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UINT32 Response;
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UINT32 Request;
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UINT32 RequestParameter;
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UINT32 LastRequest;
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UINT32 ReturnCode;
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} PHYSICAL_PRESENCE_NVS;
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typedef struct {
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UINT8 SoftwareSmi;
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UINT32 Parameter;
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UINT32 Request;
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UINT32 ReturnCode;
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} MEMORY_CLEAR_NVS;
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typedef struct {
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PHYSICAL_PRESENCE_NVS PhysicalPresence;
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MEMORY_CLEAR_NVS MemoryClear;
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} TCG_NVS;
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typedef struct {
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UINT8 OpRegionOp;
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UINT32 NameString;
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UINT8 RegionSpace;
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UINT8 DWordPrefix;
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UINT32 RegionOffset;
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UINT8 BytePrefix;
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UINT8 RegionLen;
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} AML_OP_REGION_32_8;
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#pragma pack()
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//
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// The definition for TCG MOR
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//
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#define ACPI_FUNCTION_DSM_MEMORY_CLEAR_INTERFACE 1
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#define ACPI_FUNCTION_PTS_CLEAR_MOR_BIT 2
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//
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// The return code for Memory Clear Interface Functions
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//
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#define MOR_REQUEST_SUCCESS 0
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#define MOR_REQUEST_GENERAL_FAILURE 1
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#endif // __TCG_SMM_H__
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