audk/UefiCpuPkg/PiSmmCpuDxeSmm/X64
Sheng, W 455b0347a7 UefiCpuPkg/PiSmmCpuDxeSmm: Use SMM Interrupt Shadow Stack
When CET shadow stack feature is enabled, it needs to use IST for the
 exceptions, and uses interrupt shadow stack for the stack switch.
Shadow stack should be 32 bytes aligned.
Check IST field, when clear shadow stack token busy bit when using retf.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3728

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-11-12 12:50:19 +00:00
..
Cet.nasm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
MpFuncs.nasm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
PageTbl.c UefiCpuPkg/PiSmmCpuDxeSmm: Use SMM Interrupt Shadow Stack 2021-11-12 12:50:19 +00:00
Semaphore.c UefiCpuPkg/PiSmm: Fix various typos 2020-02-10 22:30:07 +00:00
SmiEntry.nasm UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on AMD 2020-07-07 23:25:16 +00:00
SmiException.nasm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
SmmFuncsArch.c UefiCpuPkg/PiSmmCpuDxeSmm: Use SMM Interrupt Shadow Stack 2021-11-12 12:50:19 +00:00
SmmInit.nasm UefiCpuPkg/PiSmm: Fix various typos 2020-02-10 22:30:07 +00:00
SmmProfileArch.c UefiCpuPkg/PiSmmCpu: Enable 5 level paging when CPU supports 2019-07-12 15:13:51 +08:00
SmmProfileArch.h UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00