mirror of https://github.com/acidanthera/audk.git
60 lines
2.0 KiB
NASM
60 lines
2.0 KiB
NASM
//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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EXPORT _ModuleEntryPoint
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PRESERVE8
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AREA PrePeiCoreEntryPoint, CODE, READONLY
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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// Identify CPU ID
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mrc p15, 0, r0, c0, c0, 5
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and r0, #0xf
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_SetupStack
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// Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)
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mov r3,r0 // r3 = core_id
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mul r3,r3,r2 // r3 = core_id * stack_size = offset from the stack base
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add r3,r3,r1 // r3 = stack_base + offset
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add r3,r3,r2,LSR #1 // r3 = stack_offset + (stack_size/2) <-- the top half is for the heap
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mov sp, r3
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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// move sec startup address into a data register
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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// jump to PrePeiCore C code
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// r0 = core_id
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// r1 = pei_core_address
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blx r2
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END
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