mirror of https://github.com/acidanthera/audk.git
172 lines
8.3 KiB
Plaintext
172 lines
8.3 KiB
Plaintext
## @file
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# EFI/Framework Open Virtual Machine Firmware (OVMF) platform
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#
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# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = OvmfPkg
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PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Loads and boots a Linux kernel image
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#
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LoadLinuxLib|Include/Library/LoadLinuxLib.h
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## @libraryclass Save and restore variables using a file
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#
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NvVarsFileLib|Include/Library/NvVarsFileLib.h
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## @libraryclass Provides services to work with PCI capabilities in PCI
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# config space.
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PciCapLib|Include/Library/PciCapLib.h
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## @libraryclass Layered on top of PciCapLib, allows clients to plug an
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# EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
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# space access.
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PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
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## @libraryclass Layered on top of PciCapLib, allows clients to plug a
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# PciSegmentLib backend into PciCapLib, for config space
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# access.
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PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
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## @libraryclass Register a status code handler for printing the Boot
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# Manager's LoadImage() and StartImage() preparations, and
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# return codes, to the UEFI console.
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PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
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## @libraryclass Access QEMU's firmware configuration interface
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#
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QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
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## @libraryclass S3 support for QEMU fw_cfg
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#
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QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
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## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
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# fw_cfg file.
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#
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QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
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## @libraryclass Serialize (and deserialize) variables
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#
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SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
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## @libraryclass Invoke Xen hypercalls
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#
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XenHypercallLib|Include/Library/XenHypercallLib.h
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## @libraryclass Manage XenBus device path and I/O handles
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#
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XenIoMmioLib|Include/Library/XenIoMmioLib.h
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[Guids]
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gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
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gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
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gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
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gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
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gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
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gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
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gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
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[Protocols]
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gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
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gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
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gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
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gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
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[PcdsFixedAtBuild]
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
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## This flag is used to control the destination port for PlatformDebugLibIoPort
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gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
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## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
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# LUNs are retrieved from the host during virtio-scsi setup.
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# MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
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# possible devices. This can take extremely long, for example with
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# MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
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# MaxTarget and MaxLun, independently, should the host report higher values,
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# so that scanning the number of devices given by their product is still
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# acceptably fast.
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gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
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gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
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gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
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[PcdsDynamic, PcdsDynamicEx]
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gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
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gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
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## The IO port aperture shared by all PCI root bridges.
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#
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
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## The 32-bit MMIO aperture shared by all PCI root bridges.
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#
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
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## The 64-bit MMIO aperture shared by all PCI root bridges.
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#
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
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## The following setting controls how many megabytes we configure as TSEG on
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# Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
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# cause undefined behavior. During boot, the PCD is updated by PlatformPei
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# to reflect the extended TSEG size, if one is advertized by QEMU.
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#
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# This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
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[PcdsFeatureFlag]
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gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
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gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
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## This feature flag enables SMM/SMRAM support. Note that it also requires
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# such support from the underlying QEMU instance; if that support is not
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# present, the firmware will reject continuing after a certain point.
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#
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# The flag also acts as a general "security switch"; when TRUE, many
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# components will change behavior, with the goal of preventing a malicious
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# runtime OS from tampering with firmware structures (special memory ranges
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# used by OVMF, the varstore pflash chip, LockBox etc).
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gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
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