mirror of https://github.com/acidanthera/audk.git
204 lines
5.3 KiB
Plaintext
204 lines
5.3 KiB
Plaintext
/**************************************************************************;
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;* *;
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;* *;
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;* Intel Corporation - ACPI Reference Code for the Baytrail *;
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;* Family of Customer Reference Boards. *;
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;* *;
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;* *;
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;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
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;
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; This program and the accompanying materials are licensed and made available under
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; the terms and conditions of the BSD License that accompanies this distribution.
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; The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;* *;
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;* *;
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;**************************************************************************/
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DefinitionBlock (
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"Rtd3.aml",
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"SSDT",
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1,
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"AcpiRef",
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"Msg_Rtd3",
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0x1000
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)
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{
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External(RTD3) //flag if RTD3 is enabled
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If(LEqual(RTD3,1))
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{
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Scope (\_SB)
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{
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Name(OSCI, 0) // \_SB._OSC DWORD2 input
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Name(OSCO, 0) // \_SB._OSC DWORD2 output
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//Arg0 -- A buffer containing UUID
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//Arg1 -- An Interger containing a Revision ID of the buffer format
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//Arg2 -- An interger containing a count of entries in Arg3
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//Arg3 -- A buffer containing a list of DWORD capacities
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Method(_OSC, 4, NotSerialized)
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{
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// Check for proper UUID
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If(LEqual(Arg0, ToUUID("0811B06E-4A27-44F9-8D60-3CBBC22E7B48")))
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{
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CreateDWordField(Arg3,0,CDW1) //bit1,2 is always clear
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CreateDWordField(Arg3,4,CDW2) //Table 6-147 from ACPI spec
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Store(CDW2, OSCI) // Save DWord2
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Or(OSCI, 0x4, OSCO) // Only allow _PR3 support
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If(LNotEqual(Arg1,One))
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{
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Or(CDW1,0x08,CDW1) // Unknown revision
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}
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If(LNotEqual(OSCI, OSCO))
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{
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Or(CDW1,0x10,CDW1) // Capabilities bits were masked
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}
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Store(OSCO, CDW2) // Replace DWord2
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Return(Arg3)
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} Else
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{
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Or(CDW1,4,CDW1) // Unrecognized UUID
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Return(Arg3)
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}
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}// End _OSC
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}
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}//end of RTD3 condition
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//USB RTD3 code
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If(LEqual(RTD3,1))
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{
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Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR13)
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{
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Name(_PR0, Package() {\PR34})
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Name(_PR3, Package() {\PR34})
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Method(_S0W, 0)
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{
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If(And(\_SB.OSCO, 0x04)) // PMEs can be genrated from D3cold
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{
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Return(4) // OS comprehends D3cold, as described via \_SB._OSC
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} Else
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{
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Return(3)
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}
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} // End _S0W
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}
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Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR14)
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{
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Name(_PR0, Package() {\PR34})
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Name(_PR3, Package() {\PR34})
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Method(_S0W, 0)
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{
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If(And(\_SB.OSCO, 0x04))
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{
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Return(4)
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} Else
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{
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Return(3)
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}
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} // End _S0W
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}
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Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR15)
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{
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Name(_PR0, Package() {\PR56})
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Name(_PR3, Package() {\PR56})
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Method(_S0W, 0)
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{
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If(And(\_SB.OSCO, 0x04))
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{
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Return(4)
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} Else
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{
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Return(3)
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}
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} // End _S0W
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}
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Scope(\_SB.PCI0.EHC1.HUBN.PR01.PR16)
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{
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Name(_PR0, Package() {\PR56})
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Name(_PR3, Package() {\PR56})
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Method(_S0W, 0)
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{
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If(And(\_SB.OSCO, 0x04))
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{
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Return(4)
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} Else
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{
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Return(3)
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}
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} // End _S0W
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}
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Scope(\_SB.PCI0.XHC1) // XHCI host only controller
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{
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Method(_PS0,0,Serialized) // set device into D0 state
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{
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}
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Method(_PS3,0,Serialized) // place device into D3H state
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{
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//write to PMCSR
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}
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Method(_DSW, 3,Serialized) // enable or disable the device’s ability to wake a sleeping system.
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{
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}
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}
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Scope(\_SB.PCI0.XHC1.RHUB.HS01)
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{
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}
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Scope(\_SB.PCI0.XHC1.RHUB.SSP1)
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{
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}
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Scope(\_SB.PCI0.XHC2) // OTG
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{
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Method(_PS0,0,Serialized) // set device into D0 state
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{
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}
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Method(_PS3,0,Serialized) // place device into D3H state
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{
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//write to PMCSR
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}
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Method(_DSW, 3,Serialized) // enable or disable the device’s ability to wake a sleeping system.
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{
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}
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}
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Scope(\_SB.PCI0.XHC2.RHUB.HS01)
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{
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}
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Scope(\_SB.PCI0.XHC2.RHUB.SSP1)
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{
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}
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} //If(LEqual(RTD3,1)) USB
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}//end of SSDT
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