mirror of https://github.com/acidanthera/audk.git
123 lines
5.2 KiB
C
123 lines
5.2 KiB
C
/** @file
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* Header defining RealView EB constants (Base addresses, sizes, flags)
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __ARM_EB_H__
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#define __ARM_EB_H__
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/*******************************************
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// Platform Memory Map
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*******************************************/
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// Can be NOR, DOC, DRAM, SRAM
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#define ARM_EB_REMAP_BASE 0x00000000
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#define ARM_EB_REMAP_SZ 0x04000000
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// Motherboard Peripheral and On-chip peripheral
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#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE 0x10000000
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#define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ 0x10000000
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#define ARM_EB_BOARD_PERIPH_BASE 0x10000000
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//#define ARM_EB_CHIP_PERIPH_BASE 0x10020000
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// SMC
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#define ARM_EB_SMC_BASE 0x40000000
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#define ARM_EB_SMC_SZ 0x20000000
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// NOR Flash 1
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#define ARM_EB_SMB_NOR_BASE 0x40000000
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#define ARM_EB_SMB_NOR_SZ 0x04000000 /* 64 MB */
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// DOC Flash
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#define ARM_EB_SMB_DOC_BASE 0x44000000
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#define ARM_EB_SMB_DOC_SZ 0x04000000 /* 64 MB */
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// SRAM
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#define ARM_EB_SMB_SRAM_BASE 0x48000000
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#define ARM_EB_SMB_SRAM_SZ 0x02000000 /* 32 MB */
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// USB, Ethernet, VRAM
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#define ARM_EB_SMB_PERIPH_BASE 0x4E000000
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//#define ARM_EB_SMB_PERIPH_VRAM 0x4C000000
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#define ARM_EB_SMB_PERIPH_SZ 0x02000000 /* 32 MB */
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// Logic Tile
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#define ARM_EB_LOGIC_TILE_BASE 0xC0000000
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#define ARM_EB_LOGIC_TILE_SZ 0x40000000
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/*******************************************
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// Motherboard peripherals
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*******************************************/
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// Define MotherBoard SYS flags offsets (from ARM_EB_BOARD_PERIPH_BASE)
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#define ARM_EB_SYS_ID_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00000)
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#define ARM_EB_SYS_OSC4_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0001C)
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#define ARM_EB_SYS_LOCK_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00020)
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#define ARM_EB_SYS_100HZ_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00024)
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#define ARM_EB_SYS_FLAGS_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
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#define ARM_EB_SYS_FLAGS_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
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#define ARM_EB_SYS_FLAGS_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
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#define ARM_EB_SYS_FLAGS_NV_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
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#define ARM_EB_SYS_FLAGS_NV_SET_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
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#define ARM_EB_SYS_FLAGS_NV_CLR_REG (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
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#define ARM_EB_SYS_RESETCTL_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00040)
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#define ARM_EB_SYS_CLCD_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00050)
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#define ARM_EB_SYS_PROCID0_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
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#define ARM_EB_SYS_PROCID1_REG (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
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// SP810 Controller
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#define SP810_CTRL_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
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// SYSTRCL Register
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#define ARM_EB_SYSCTRL 0x10001000
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// Dynamic Memory Controller Base
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#define ARM_EB_DMC_BASE 0x10018000
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// Static Memory Controller Base
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#define ARM_EB_SMC_CTRL_BASE 0x10080000
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//Note: Moving the framebuffer into the 0x70000000-0x80000000 region does not seem to work
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#define PL111_CLCD_VRAM_BASE 0x00100000
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/*// System Configuration Controller register Base addresses
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//#define ARM_EB_SYS_CFG_CTRL_BASE 0x100E2000
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#define ARM_EB_SYS_CFGRW0_REG 0x100E2000
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#define ARM_EB_SYS_CFGRW1_REG 0x100E2004
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#define ARM_EB_SYS_CFGRW2_REG 0x100E2008
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#define ARM_EB_CFGRW1_REMAP_NOR0 0
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#define ARM_EB_CFGRW1_REMAP_NOR1 (1 << 28)
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#define ARM_EB_CFGRW1_REMAP_EXT_AXI (1 << 29)
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#define ARM_EB_CFGRW1_REMAP_DRAM (1 << 30)
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// PL301 Fast AXI Base Address
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#define ARM_EB_FAXI_BASE 0x100E9000
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// L2x0 Cache Controller Base Address
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//#define ARM_EB_L2x0_CTLR_BASE 0x1E00A000*/
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#define ARM_EB_SYS_PROC_ID_MASK (UINT32)(0xFFU << 24)
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#define ARM_EB_SYS_PROC_ID_CORTEX_A8 (UINT32)(0x0EU << 24)
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#define ARM_EB_SYS_PROC_ID_CORTEX_A9 (UINT32)(0x0CU << 24)
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/*******************************************
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// System Configuration Control
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*******************************************/
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// Sites where the peripheral is fitted
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#define ARM_EB_UNSUPPORTED ~0
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#define VIRTUAL_SYS_CFG(site,func) (((site) << 24) | (func))
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#define SYS_CFG_RTC VIRTUAL_SYS_CFG(ARM_EB_UNSUPPORTED,1)
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#endif
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