Tom Lendacky e674096acc OvmfPkg/ResetVector: Fix assembler bit test flag check ... Commit 63c50d3ff2 changed the check that is used to determine if SEV-ES is active. Originally, a CMP instruction with a supporting JZ instruction was used for the check. It was changed to use the BT instruction but not JZ instruction. The result of a BT instruction changes the the carry flag (CF) and not the zero flag (ZF). As a result, the wrong condition is being checked. Update the JZ to a JNC to properly detect if SEV-ES is active. Fixes: 63c50d3ff2 ("OvmfPkg/ResetVector: cache the SEV status MSR...") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>		2023-07-14 22:52:58 +00:00
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Ia16	OvmfPkg/ResetVector: introduce SEV metadata descriptor for VMM use	2021-12-09 06:28:10 +00:00
Ia32	OvmfPkg/ResetVector: Fix assembler bit test flag check	2023-07-14 22:52:58 +00:00
X64	OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase	2021-12-09 06:28:10 +00:00
Main.asm	OvmfPkg: Make an Ia32/X64 hybrid build work with SEV	2022-05-20 06:29:34 +00:00
ResetVector.inf	OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase	2021-12-09 06:28:10 +00:00
ResetVector.nasmb	OvmfPkg: Make an Ia32/X64 hybrid build work with SEV	2022-05-20 06:29:34 +00:00