mirror of https://github.com/acidanthera/audk.git
306 lines
11 KiB
Plaintext
306 lines
11 KiB
Plaintext
/*++
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Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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IgdOpRn.ASL
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Abstract:
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IGD OpRegion/Software SCI Reference Code for the Baytrail Family.
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This file contains the interrupt handler code for the Integrated
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Graphics Device (IGD) OpRegion/Software SCI mechanism.
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--*/
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//NOTES:
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//
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// (1) The code contained in this file inherits the scope in which it
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// was included. So BIOS developers must be sure to include this
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// file in the scope associated with the graphics device
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// (ex. \_SB.PCI0.GFX0).
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// (2) Create a _L06 method under the GPE scope to handle the event
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// generated by the graphics driver. The _L06 method must call
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// the GSCI method in this file.
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// (3) The MCHP operation region assumes that _ADR and _BBN names
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// corresponding to bus 0, device0, function 0 have been declared
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// under the PCI0 scope.
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// (4) Before the first execution of the GSCI method, the base address
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// of the GMCH SCI OpRegion must be programmed where the driver can
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// access it. A 32bit scratch register at 0xFC in the IGD PCI
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// configuration space (B0/D2/F0/R0FCh) is used for this purpose.
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// Define an OperationRegion to cover the GMCH PCI configuration space as
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// described in the IGD OpRegion specificiation.
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// Define an OperationRegion to cover the IGD PCI configuration space as
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// described in the IGD OpRegion specificiation.
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OperationRegion(IGDP, PCI_Config,0x00,0x100)
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Field(IGDP, AnyAcc, NoLock, Preserve)
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{
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Offset(0x10), // GTTMMADR
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MADR, 32,
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Offset(0x50), // GMCH Graphics Control Register
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, 1,
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GIVD, 1, // IGD VGA disable bit
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, 1,
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GUMA, 5, // Stolen memory size
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, 8,
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Offset(0x54),
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, 4,
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GMFN, 1, // Gfx function 1 enable
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, 27,
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Offset(0x5C), // Stolen Memory Base Address
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GSTM, 32,
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Offset(0xE0), // Reg 0xE8, SWSCI control register
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GSSE, 1, // Graphics SCI event (1=event pending)
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GSSB, 14, // Graphics SCI scratchpad bits
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GSES, 1, // Graphics event select (1=SCI)
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Offset(0xE4),
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ASLE, 8, // Reg 0xE4, ASLE interrupt register
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, 24, // Only use first byte of ASLE reg
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Offset(0xFC),
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ASLS, 32, // Reg 0xFC, Address of the IGD OpRegion
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}
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Method (MCHK, 0, Serialized)
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{
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If (LNotEqual (MADR, 0xFFFFFFFF))
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{
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OperationRegion(IGMM,SystemMemory,MADR,0x3000)
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Field(IGMM,AnyAcc, NoLock, Preserve)
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{
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Offset(0X20C8),
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, 4,
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DCFE, 4, // DISPLAY_CLOCK_FREQUENCY_ENCODING
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}
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}
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}
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// Define an OperationRegion to cover the IGD OpRegion layout.
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OperationRegion(IGDM, SystemMemory, ASLB, 0x2000)
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Field(IGDM, AnyAcc, NoLock, Preserve)
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{
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// OpRegion Header
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SIGN, 128, // Signature-"IntelGraphicsMem"
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SIZE, 32, // OpRegion Size
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OVER, 32, // OpRegion Version
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SVER, 256, // System BIOS Version
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VVER, 128, // VBIOS Version
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GVER, 128, // Driver version
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MBOX, 32, // Mailboxes supported
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DMOD, 32, // Driver Model
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PCON, 32, // 96, Platform Configuration
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// OpRegion Mailbox 1 (Public ACPI Methods)
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// Note: Mailbox 1 is normally reserved for desktop platforms.
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Offset(0x100),
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DRDY, 32, // Driver readiness (ACPI notification)
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CSTS, 32, // Notification status
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CEVT, 32, // Current event
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Offset(0x120),
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DIDL, 32, // Supported display device ID list
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DDL2, 32, // Allows for 8 devices
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DDL3, 32,
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DDL4, 32,
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DDL5, 32,
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DDL6, 32,
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DDL7, 32,
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DDL8, 32,
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CPDL, 32, // Currently present display list
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CPL2, 32, // Allows for 8 devices
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CPL3, 32,
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CPL4, 32,
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CPL5, 32,
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CPL6, 32,
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CPL7, 32,
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CPL8, 32,
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CAD1, 32, // Currently active display list
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CAL2, 32, // Allows for 8 devices
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CAL3, 32,
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CAL4, 32,
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CAL5, 32,
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CAL6, 32,
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CAL7, 32,
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CAL8, 32,
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NADL, 32, // Next active display list
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NDL2, 32, // Allows for 8 devices
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NDL3, 32,
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NDL4, 32,
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NDL5, 32,
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NDL6, 32,
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NDL7, 32,
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NDL8, 32,
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ASLP, 32, // ASL sleep timeout
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TIDX, 32, // Toggle table index
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CHPD, 32, // Current hot plug enable indicator
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CLID, 32, // Current lid state indicator
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CDCK, 32, // Current docking state indicator
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SXSW, 32, // Display switch notify on resume
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EVTS, 32, // Events supported by ASL (diag only)
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CNOT, 32, // Current OS notifications (diag only)
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NRDY, 32,
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// OpRegion Mailbox 2 (Software SCI Interface)
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Offset(0x200), // SCIC
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SCIE, 1, // SCI entry bit (1=call unserviced)
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GEFC, 4, // Entry function code
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GXFC, 3, // Exit result
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GESF, 8, // Entry/exit sub-function/parameter
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, 16, // SCIC[31:16] reserved
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Offset(0x204), // PARM
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PARM, 32, // PARM register (extra parameters)
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DSLP, 32, // Driver sleep time out
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// OpRegion Mailbox 3 (BIOS to Driver Notification)
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// Note: Mailbox 3 is normally reserved for desktop platforms.
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Offset(0x300),
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ARDY, 32, // Driver readiness (power conservation)
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ASLC, 32, // ASLE interrupt command/status
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TCHE, 32, // Technology enabled indicator
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ALSI, 32, // Current ALS illuminance reading
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BCLP, 32, // Backlight brightness
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PFIT, 32, // Panel fitting state or request
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CBLV, 32, // Current brightness level
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BCLM, 320, // Backlight brightness level duty cycle mapping table
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CPFM, 32, // Current panel fitting mode
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EPFM, 32, // Enabled panel fitting modes
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PLUT, 592, // Optional. 74-byte Panel LUT Table
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PFMB, 32, // Optional. PWM Frequency and Minimum Brightness
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CCDV, 32, // Optional. Gamma, Brightness, Contrast values.
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PCFT, 32, // Optional. Power Conservation Features
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Offset(0x3B6),
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STAT, 32, // Status register
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// OpRegion Mailbox 4 (VBT)
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Offset(0x400),
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GVD1, 0xC000, // 6K bytes maximum VBT image
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// OpRegion Mailbox 5 (BIOS to Driver Notification Extension)
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Offset(0x1C00),
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PHED, 32, // Panel Header
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BDDC, 2048, // Panel EDID (Max 256 bytes)
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}
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// Convert boot display type into a port mask.
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Name (DBTB, Package()
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{
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0x0000, // Automatic
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0x0007, // Port-0 : Integrated CRT
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0x0038, // Port-1 : DVO-A, or Integrated LVDS
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0x01C0, // Port-2 : SDVO-B, or SDVO-B/C
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0x0E00, // Port-3 : SDVO-C
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0x003F, // [CRT + DVO-A / Integrated LVDS]
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0x01C7, // [CRT + SDVO-B] or [CRT + SDVO-B/C]
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0x0E07, // [CRT + SDVO-C]
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0x01F8, // [DVO-A / Integrated LVDS + SDVO-B]
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0x0E38, // [DVO-A / Integrated LVDS + SDVO-C]
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0x0FC0, // [SDVO-B + SDVO-C]
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0x0000, // Reserved
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0x0000, // Reserved
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0x0000, // Reserved
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0x0000, // Reserved
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0x0000, // Reserved
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0x7000, // Port-4: Integrated TV
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0x7007, // [Integrated TV + CRT]
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0x7038, // [Integrated TV + LVDS]
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0x71C0, // [Integrated TV + DVOB]
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0x7E00 // [Integrated TV + DVOC]
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})
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// Core display clock value table.
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Name (CDCT, Package()
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{
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Package() {160},
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Package() {200},
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Package() {267},
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Package() {320},
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Package() {356},
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Package() {400},
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})
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// Defined exit result values:
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Name (SUCC, 1) // Exit result: Success
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Name (NVLD, 2) // Exit result: Invalid parameter
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Name (CRIT, 4) // Exit result: Critical failure
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Name (NCRT, 6) // Exit result: Non-critical failure
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/************************************************************************;
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;*
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;* Name: GSCI
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;*
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;* Description: Handles an SCI generated by the graphics driver. The
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;* PARM and SCIC input fields are parsed to determine the
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;* functionality requested by the driver. GBDA or SBCB
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;* is called based on the input data in SCIC.
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;*
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;* Usage: The method must be called in response to a GPE 06 event
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;* which will be generated by the graphics driver.
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;* Ex: Method(\_GPE._L06) {Return(\_SB.PCI0.GFX0.GSCI())}
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;*
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;* Input: PARM and SCIC are indirect inputs
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;*
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;* Output: PARM and SIC are indirect outputs
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;*
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;* References: GBDA (Get BIOS Data method), SBCB (System BIOS Callback
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;* method)
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;*
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;************************************************************************/
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Method (GSCI, 0, Serialized)
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{
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Include("IgdOGBDA.ASL") // "Get BIOS Data" Functions
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Include("IgdOSBCB.ASL") // "System BIOS CallBacks"
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If (LEqual(GEFC, 4))
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{
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Store(GBDA(), GXFC) // Process Get BIOS Data functions
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}
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If (LEqual(GEFC, 6))
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{
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Store(SBCB(), GXFC) // Process BIOS Callback functions
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}
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Store(0, GEFC) // Wipe out the entry function code
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Store(1, SCIS) // Clear the GUNIT SCI status bit in PCH ACPI I/O space.
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Store(0, GSSE) // Clear the SCI generation bit in PCI space.
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Store(0, SCIE) // Clr SCI serviced bit to signal completion
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Return(Zero)
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}
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// Include MOBLFEAT.ASL for mobile systems only. Remove for desktop.
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Include("IgdOMOBF.ASL") // IGD SCI mobile features
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