mirror of https://github.com/acidanthera/audk.git
115 lines
3.6 KiB
ArmAsm
115 lines
3.6 KiB
ArmAsm
//
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLibV8.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 3
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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StartupAddr: .dword CEntryPoint
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ASM_PFX(_ModuleEntryPoint):
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// Do early platform specific actions
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bl ASM_PFX(ArmPlatformPeiBootAction)
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// NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
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// and configure the system accordingly. EL2 is default if possible.
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// If we started in EL3 we need to switch and run at EL2.
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// If we are running at EL2 stay in EL2
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// If we are starting at EL1 stay in EL1.
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// If started at EL3 Sec is run and switches to EL2 before jumping to PEI.
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// If started at EL1 or EL2 Sec jumps directly to PEI without making any
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// changes.
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// Which EL are we running at? Every EL needs some level of setup...
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EL1_OR_EL2_OR_EL3(x0)
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1:bl ASM_PFX(SetupExceptionLevel1)
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b ASM_PFX(MainEntryPoint)
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2:bl ASM_PFX(SetupExceptionLevel2)
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b ASM_PFX(MainEntryPoint)
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3:// If we are at EL3 we die.
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b dead
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ASM_PFX(MainEntryPoint):
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// Identify CPU ID
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bl ASM_PFX(ArmReadMpidr)
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// Keep a copy of the MpId register value
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mov x5, x0
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// Is it the Primary Core ?
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bl ASM_PFX(ArmPlatformIsPrimaryCore)
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), x1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
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add x1, x1, x2
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// x0 is equal to 1 if I am the primary core
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cmp x0, #1
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b.eq _SetupPrimaryCoreStack
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_SetupSecondaryCoreStack:
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// x1 contains the base of the secondary stacks
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// Get the Core Position
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mov x6, x1 // Save base of the secondary stacks
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mov x0, x5
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bl ASM_PFX(ArmPlatformGetCorePosition)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add x0, x0, #1
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// StackOffset = CorePos * StackSize
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2)
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mul x0, x0, x2
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// SP = StackBase + StackOffset
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add sp, x6, x0
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_PrepareArguments:
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2)
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add x2, x2, #8
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ldr x1, [x2]
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr x3, StartupAddr
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// Jump to PrePeiCore C code
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// x0 = mp_id
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// x1 = pei_core_address
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mov x0, x5
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blr x3
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_SetupPrimaryCoreStack:
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// x1 contains the top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x2)
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// The reserved space for global variable must be 16-bytes aligned for pushing
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// 128-bit variable on the stack
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SetPrimaryStack (x1, x2, x3, x4)
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b _PrepareArguments
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dead:
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b dead
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