mirror of https://github.com/acidanthera/audk.git
371 lines
12 KiB
C
371 lines
12 KiB
C
/** @file
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Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <PiDxe.h>
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#include <Library/ArmPlatformSysConfigLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/LcdPlatformLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/EdidDiscovered.h>
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#include <Protocol/EdidActive.h>
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#include <ArmPlatform.h>
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typedef struct {
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UINT32 Mode;
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UINT32 HorizontalResolution;
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UINT32 VerticalResolution;
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LCD_BPP Bpp;
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UINT32 OscFreq;
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UINT32 HSync;
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UINT32 HBackPorch;
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UINT32 HFrontPorch;
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UINT32 VSync;
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UINT32 VBackPorch;
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UINT32 VFrontPorch;
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} LCD_RESOLUTION;
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LCD_RESOLUTION mResolutions[] = {
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{ // Mode 0 : VGA : 640 x 480 x 24 bpp
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VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,
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VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
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VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
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},
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{ // Mode 1 : SVGA : 800 x 600 x 24 bpp
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SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,
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SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
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SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
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},
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{ // Mode 2 : XGA : 1024 x 768 x 24 bpp
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XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,
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XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
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XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
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},
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{ // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
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SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),
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SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
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SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
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},
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{ // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
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UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),
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UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
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UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
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},
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{ // Mode 5 : HD : 1920 x 1080 x 24 bpp
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HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),
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HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
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HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
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},
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{ // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)
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VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,
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VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
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VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
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},
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{ // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)
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SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,
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SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
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SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
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},
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{ // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)
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XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,
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XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
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XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
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},
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{ // Mode 9 : VGA : 640 x 480 x 15 bpp
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VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,
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VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
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VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
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},
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{ // Mode 10 : SVGA : 800 x 600 x 15 bpp
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SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,
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SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
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SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
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},
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{ // Mode 11 : XGA : 1024 x 768 x 15 bpp
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XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,
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XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
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XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
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},
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{ // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings
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XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,
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XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
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XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
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},
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{ // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)
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VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,
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VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
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VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
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},
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{ // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)
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SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,
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SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
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SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
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},
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{ // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)
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XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,
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XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
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XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
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}
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};
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EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = {
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0,
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NULL
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};
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EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {
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0,
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NULL
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};
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EFI_STATUS
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LcdPlatformInitializeDisplay (
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IN EFI_HANDLE Handle
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)
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{
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EFI_STATUS Status;
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// Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard
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Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
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if (!EFI_ERROR(Status)) {
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// Install the EDID Protocols
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Status = gBS->InstallMultipleProtocolInterfaces(
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&Handle,
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&gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,
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&gEfiEdidActiveProtocolGuid, &mEdidActive,
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NULL
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);
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}
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return Status;
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}
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EFI_STATUS
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LcdPlatformGetVram (
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OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
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OUT UINTN* VramSize
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)
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{
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EFI_STATUS Status;
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Status = EFI_SUCCESS;
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// Is it on the motherboard or on the daughterboard?
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switch(PL111_CLCD_SITE) {
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case ARM_VE_MOTHERBOARD_SITE:
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*VramBaseAddress = (EFI_PHYSICAL_ADDRESS) PL111_CLCD_VRAM_MOTHERBOARD_BASE;
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*VramSize = LCD_VRAM_SIZE;
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break;
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case ARM_VE_DAUGHTERBOARD_1_SITE:
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*VramBaseAddress = (EFI_PHYSICAL_ADDRESS) LCD_VRAM_CORE_TILE_BASE;
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*VramSize = LCD_VRAM_SIZE;
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// Allocate the VRAM from the DRAM so that nobody else uses it.
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Status = gBS->AllocatePages( AllocateAddress, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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// Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable.
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Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize,
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EFI_MEMORY_WC);
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ASSERT_EFI_ERROR(Status);
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if (EFI_ERROR(Status)) {
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gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES(*VramSize));
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return Status;
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}
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break;
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default:
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// Unsupported site
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Status = EFI_UNSUPPORTED;
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break;
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}
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return Status;
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}
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UINT32
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LcdPlatformGetMaxMode (
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VOID
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)
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{
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// The following line will report correctly the total number of graphics modes
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// supported by the PL111CLCD.
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//return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION)) - 1;
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// However, on some platforms it is desirable to ignore some graphics modes.
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// This could be because the specific implementation of PL111 has certain limitations.
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// Set the maximum mode allowed
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return (PcdGet32(PcdPL111LcdMaxMode));
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}
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EFI_STATUS
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LcdPlatformSetMode (
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IN UINT32 ModeNumber
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)
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{
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EFI_STATUS Status;
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UINT32 LcdSite;
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UINT32 OscillatorId;
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SYS_CONFIG_FUNCTION Function;
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UINT32 SysId;
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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return EFI_INVALID_PARAMETER;
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}
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LcdSite = PL111_CLCD_SITE;
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switch(LcdSite) {
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case ARM_VE_MOTHERBOARD_SITE:
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Function = SYS_CFG_OSC;
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OscillatorId = PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID;
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break;
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case ARM_VE_DAUGHTERBOARD_1_SITE:
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Function = SYS_CFG_OSC_SITE1;
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OscillatorId = (UINT32)PcdGet32(PcdPL111LcdVideoModeOscId);
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// Set the video mode oscillator
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Status = ArmPlatformSysConfigSetDevice (Function, OscillatorId, mResolutions[ModeNumber].OscFreq);
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if (EFI_ERROR(Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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// The FVP foundation model does not have an LCD.
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// On the FVP models the GIC variant in encoded in bits [15:12].
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// Note: The DVI Mode is not modelled by RTSM or FVP models.
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SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
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if (SysId != ARM_RTSM_SYS_ID) {
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// Take out the FVP GIC variant to reduce the permutations.
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SysId &= ~ARM_FVP_SYS_ID_VARIANT_MASK;
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if (SysId != ARM_FVP_BASE_BOARD_SYS_ID) {
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// Set the DVI into the new mode
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Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
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if (EFI_ERROR(Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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}
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}
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// Set the multiplexer
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Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, LcdSite);
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if (EFI_ERROR(Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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return Status;
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}
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EFI_STATUS
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LcdPlatformQueryMode (
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IN UINT32 ModeNumber,
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OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
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)
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{
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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return EFI_INVALID_PARAMETER;
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}
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Info->Version = 0;
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Info->HorizontalResolution = mResolutions[ModeNumber].HorizontalResolution;
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Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution;
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Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
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switch (mResolutions[ModeNumber].Bpp) {
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case LCD_BITS_PER_PIXEL_24:
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Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
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Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK;
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Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK;
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Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
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Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
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break;
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case LCD_BITS_PER_PIXEL_16_555:
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case LCD_BITS_PER_PIXEL_16_565:
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case LCD_BITS_PER_PIXEL_12_444:
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case LCD_BITS_PER_PIXEL_8:
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case LCD_BITS_PER_PIXEL_4:
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case LCD_BITS_PER_PIXEL_2:
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case LCD_BITS_PER_PIXEL_1:
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default:
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// These are not supported
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ASSERT(FALSE);
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break;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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LcdPlatformGetTimings (
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IN UINT32 ModeNumber,
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OUT UINT32* HRes,
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OUT UINT32* HSync,
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OUT UINT32* HBackPorch,
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OUT UINT32* HFrontPorch,
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OUT UINT32* VRes,
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OUT UINT32* VSync,
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OUT UINT32* VBackPorch,
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OUT UINT32* VFrontPorch
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)
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{
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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return EFI_INVALID_PARAMETER;
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}
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*HRes = mResolutions[ModeNumber].HorizontalResolution;
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*HSync = mResolutions[ModeNumber].HSync;
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*HBackPorch = mResolutions[ModeNumber].HBackPorch;
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*HFrontPorch = mResolutions[ModeNumber].HFrontPorch;
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*VRes = mResolutions[ModeNumber].VerticalResolution;
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*VSync = mResolutions[ModeNumber].VSync;
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*VBackPorch = mResolutions[ModeNumber].VBackPorch;
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*VFrontPorch = mResolutions[ModeNumber].VFrontPorch;
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return EFI_SUCCESS;
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}
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EFI_STATUS
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LcdPlatformGetBpp (
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IN UINT32 ModeNumber,
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OUT LCD_BPP * Bpp
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)
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{
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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return EFI_INVALID_PARAMETER;
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}
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*Bpp = mResolutions[ModeNumber].Bpp;
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return EFI_SUCCESS;
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}
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