mirror of https://github.com/acidanthera/audk.git
718 lines
22 KiB
ArmAsm
718 lines
22 KiB
ArmAsm
/** @file
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*
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* Copyright 2006, Intel Corporation
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* All rights reserved. This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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* CpuInterrupt.S
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*
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* Abstract:
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*
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**/
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.globl ASM_PFX(SystemTimerHandler)
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.globl ASM_PFX(SystemExceptionHandler)
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.globl ASM_PFX(mExceptionCodeSize)
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.globl ASM_PFX(InitDescriptor)
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.globl ASM_PFX(InstallInterruptHandler)
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ASM_PFX(mExceptionCodeSize): .long 9
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/**
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* VOID
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* InitDescriptor (
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* VOID
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* )
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**/
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ASM_PFX(InitDescriptor):
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lgdt gdtr
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lidt idtr
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ret
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/**
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* VOID
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* InstallInterruptHandler (
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* UINTN Vector,
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* VOID (*Handler)(VOID)
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* )
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**/
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ASM_PFX(InstallInterruptHandler):
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movl %esp, %ebp
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pushl %edi
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pushfl # save eflags
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cli # turn off interrupts
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subl $6, %esp # open some space on the stack
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movl %esp, %edi
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sidt %es:(%edi) # get fword address of IDT
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movl %es:2(%edi), %edi # move offset of IDT into EDI
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addl $6, %esp # correct stack
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mov 4(%ebp), %eax # Get vector number
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shll $3, %eax # multiply by 8 to get offset
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addl %eax, %edi # add to IDT base to get entry
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movl 8(%ebp), %eax # load new address into IDT entry
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movw %ax, %es:(%edi) # write bits 15..0 of offset
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shrl $16, %eax # use ax to copy 31..16 to descriptors
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movw %ax, %es:6(%edi) # write bits 31..16 of offset
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popfl # restore flags (possible enabling interrupts)
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pop %edi
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ret
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.macro JmpCommonIdtEntry errno, vector
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/* jmp commonIdtEntry - this must be hand coded to keep the assembler from
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* using a 8 bit reletive jump when the entries are
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* within 255 bytes of the common entry. This must
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* be done to maintain the consistency of the size
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* of entry points...
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*/
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pushl \errno
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pushl \vector
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#.byte 0e9h # jmp 16 bit reletive
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#.long commonIdtEntry - $ - $4 # offset to jump to
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jmpl *commonIdtEntry
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.endm
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.align 0x02
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ASM_PFX(SystemExceptionHandler):
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INT0:
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JmpCommonIdtEntry errno=0,vector=0
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INT1:
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JmpCommonIdtEntry errno=0,vector=1
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INT2:
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JmpCommonIdtEntry errno=0,vector=2
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INT3:
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JmpCommonIdtEntry errno=0,vector=3
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INT4:
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JmpCommonIdtEntry errno=0,vector=4
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INT5:
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JmpCommonIdtEntry errno=0,vector=5
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INT6:
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JmpCommonIdtEntry errno=0,vector=6
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INT7:
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JmpCommonIdtEntry errno=0,vector=7
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INT8:
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# Double fault causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $8
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jmpl *commonIdtEntry
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INT9:
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JmpCommonIdtEntry errno=0,vector=9
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INT10:
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# Invalid TSS causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $10
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jmpl *commonIdtEntry
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INT11:
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# Segment Not Present causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $11
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jmpl *commonIdtEntry
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INT12:
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# Stack fault causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $12
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jmpl *commonIdtEntry
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INT13:
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# GP fault causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $13
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jmpl *commonIdtEntry
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INT14:
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# Page fault causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $14
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jmpl *commonIdtEntry
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INT15:
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JmpCommonIdtEntry errno=0,vector=15
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INT16:
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JmpCommonIdtEntry errno=0,vector=16
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INT17:
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# Alignment check causes an error code to be pushed so no phony pushl necessary
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nop
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nop
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pushl $17
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jmpl *commonIdtEntry
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INT18:
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JmpCommonIdtEntry errno=0,vector=18
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INT19:
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JmpCommonIdtEntry errno=0,vector=19
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INTUnknown:
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JmpCommonIdtEntry errno=0,vector=20
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JmpCommonIdtEntry errno=0,vector=21
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JmpCommonIdtEntry errno=0,vector=22
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JmpCommonIdtEntry errno=0,vector=23
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JmpCommonIdtEntry errno=0,vector=24
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JmpCommonIdtEntry errno=0,vector=25
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JmpCommonIdtEntry errno=0,vector=26
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JmpCommonIdtEntry errno=0,vector=27
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JmpCommonIdtEntry errno=0,vector=28
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JmpCommonIdtEntry errno=0,vector=29
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JmpCommonIdtEntry errno=0,vector=30
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JmpCommonIdtEntry errno=0,vector=31
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ASM_PFX(SystemTimerHandler):
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JmpCommonIdtEntry errno=0,vector=ASM_PFX(mTimerVector)
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commonIdtEntry:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + Vector Number +
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# +---------------------+
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# + EBP +
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# +---------------------+ <-- EBP
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cli
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pushl %ebp
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movl %esp, %ebp
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#
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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# is 16-byte aligned
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#
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andl $0xfffffff0, %esp
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subl $12, %esp
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## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax#
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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leal 24(%ebp), %ecx
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pushl %ecx # ESP
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pushl (%ebp) # EBP
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pushl %esi
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pushl %edi
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## UINT32 Gs, Fs, Es, Ds, Cs, Ss#
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movl %ss, %eax
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pushl %eax
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movzwl 16(%ebp), %eax
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pushl %eax
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movl %ds, %eax
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pushl %eax
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movl %es, %eax
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pushl %eax
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movl %fs, %eax
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pushl %eax
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movl %gs, %eax
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pushl %eax
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## UINT32 Eip#
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pushl 12(%ebp)
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## UINT32 Gdtr[2], Idtr[2]#
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subl $8, %esp
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sidt (%esp)
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subl $8, %esp
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sgdt (%esp)
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## UINT32 Ldtr, Tr#
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xorl %eax, %eax
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strw %ax
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pushl %eax
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sldt %ax
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pushl %eax
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## UINT32 EFlags#
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pushl 5*4(%ebp)
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## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4#
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movl %cr4, %eax
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orl $0x208, %eax
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movl %eax, %cr4
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pushl %eax
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movl %cr3, %eax
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pushl %eax
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movl %cr2, %eax
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pushl %eax
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xorl %eax, %eax
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pushl %eax
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movl %cr0, %eax
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pushl %eax
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## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#
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movl %dr7, %eax
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pushl %eax
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## clear Dr7 while executing debugger itself
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xorl %eax, %eax
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movl %eax, %dr7
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movl %dr6, %eax
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pushl %eax
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## insure all status bits in dr6 are clear...
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xorl %eax, %eax
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movl %eax, %dr6
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movl %dr3, %eax
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pushl %eax
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movl %dr2, %eax
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pushl %eax
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movl %dr1, %eax
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pushl %eax
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movl %dr0, %eax
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pushl %eax
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## FX_SAVE_STATE_IA32 FxSaveState#
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subl $512, %esp
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movl %esp, %edi
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#.byte 0f, 0ae, 00000111y #fxsave [edi]
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fxsave (%edi)
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## UINT32 ExceptionData#
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pushl 2*4(%ebp)
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## Prepare parameter and call
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movl %esp, %edx
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pushl %edx
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movl 1*4(%ebp), %eax
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pushl %eax
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cmpl $32, %eax
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jb CallException
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call ASM_PFX(TimerHandler)
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jmp ExceptionDone
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CallException:
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call ASM_PFX(ExceptionHandler)
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ExceptionDone:
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addl $8, %esp
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cli
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## UINT32 ExceptionData#
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addl $4, %esp
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## FX_SAVE_STATE_IA32 FxSaveState#
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movl %esp, %esi
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#db 0fh, 0aeh, 00001110y # fxrstor [esi]
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fxrstor (%esi)
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addl $512, %esp
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## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#
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popl %eax
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movl %eax, %dr0
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popl %eax
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movl %eax, %dr1
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popl %eax
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movl %eax, %dr2
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popl %eax
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movl %eax, %dr3
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## skip restore of dr6. We cleared dr6 during the context save.
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addl $4, %esp
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popl %eax
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movl %eax, %dr7
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## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4#
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popl %eax
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movl %eax, %cr0
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addl $4, %esp # not for Cr1
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popl %eax
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movl %eax, %cr2
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popl %eax
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movl %eax, %cr3
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popl %eax
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movl %eax, %cr4
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## UINT32 EFlags#
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popl 5*4(%ebp)
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## UINT32 Ldtr, Tr#
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## UINT32 Gdtr[2], Idtr[2]#
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## Best not let anyone mess with these particular registers...
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addl $24, %esp
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## UINT32 Eip#
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popl 3*4(%ebp)
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## UINT32 Gs, Fs, Es, Ds, Cs, Ss#
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## NOTE - modified segment registers could hang the debugger... We
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## could attempt to insulate ourselves against this possibility,
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## but that poses risks as well.
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##
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popl %gs
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popl %fs
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popl %es
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popl %ds
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popl 4*4(%ebp)
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popl %ss
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## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax#
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popl %edi
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popl %esi
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addl $4, %esp # not for ebp
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addl $4, %esp # not for esp
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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movl %ebp, %esp
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popl %ebp
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addl $8, %esp
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iretl
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##############################################################################
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# data
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##############################################################################
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.align 2, 0x0
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gdtr:
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.word 8*8 - 1
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.long GDT_BASE
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##############################################################################
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# global descriptor table (GDT)
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##############################################################################
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.align 2, 0x90
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GDT_BASE:
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.quad 0x0 // null descriptor
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.quad 0x00cf92000000ffff // linear data segment descriptor
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.quad 0x00cf9a000000ffff // linear code segment descriptor
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.quad 0x00cf92000000ffff // system data segment descriptor
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.quad 0x00cf9a000000ffff // system code segment descriptor
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.quad 0x0 // spare segment descriptor
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.quad 0x0
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.quad 0x0
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.align 0x02
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idtr:
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.word IDT_END - IDT_BASE - 1 # IDT limit
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.long IDT_BASE
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##############################################################################
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# interrupt descriptor table (IDT)
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#
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# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
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# mappings. This implementation only uses the system timer and all other
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# IRQs will remain masked. The descriptors for vectors 33+ are provided
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# for convenience.
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##############################################################################
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.align 0x02
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IDT_BASE:
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.skip 256 * 16
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/**
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# divide by zero (INT 0)
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DIV_ZERO_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# debug exception (INT 1)
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DEBUG_EXCEPT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# NMI (INT 2)
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NMI_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# soft breakpoint (INT 3)
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BREAKPOINT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# overflow (INT 4)
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OVERFLOW_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# bounds check (INT 5)
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BOUNDS_CHECK_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# invalid opcode (INT 6)
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INVALID_OPCODE_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# device not available (INT 7)
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DEV_NOT_AVAIL_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# double fault (INT 8)
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DOUBLE_FAULT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# Coprocessor segment overrun - reserved (INT 9)
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RSVD_INTR_SEL1 equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# invalid TSS (INT 0ah)
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INVALID_TSS_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# segment not present (INT 0bh)
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SEG_NOT_PRESENT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# stack fault (INT 0ch)
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STACK_FAULT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# general protection (INT 0dh)
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GP_FAULT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# page fault (INT 0eh)
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PAGE_FAULT_SEL equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# Intel reserved - do not use (INT 0fh)
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RSVD_INTR_SEL2 equ $-IDT_BASE
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dw 0 # offset 15:0
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dw SYS_CODE_SEL # selector 15:0
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db 0 # 0 for interrupt gate
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db 0eh OR 80h # type = 386 interrupt gate, present
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dw 0 # offset 31:16
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# floating point error (INT 10h)
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FLT_POINT_ERR_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# alignment check (INT 11h)
|
|
ALIGNMENT_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# machine check (INT 12h)
|
|
MACHINE_CHECK_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# SIMD floating-point exception (INT 13h)
|
|
SIMD_EXCEPTION_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
REPEAT (32 - 20)
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
ENDM
|
|
|
|
# 72 unspecified descriptors
|
|
db (72 * 8) dup(0)
|
|
|
|
# IRQ 0 (System timer) - (INT 68h)
|
|
IRQ0_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
IRQ1_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
IRQ2_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 3 (COM 2) - (INT 6bh)
|
|
IRQ3_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 4 (COM 1) - (INT 6ch)
|
|
IRQ4_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 5 (LPT 2) - (INT 6dh)
|
|
IRQ5_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 6 (Floppy controller) - (INT 6eh)
|
|
IRQ6_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 7 (LPT 1) - (INT 6fh)
|
|
IRQ7_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 8 (RTC Alarm) - (INT 70h)
|
|
IRQ8_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 9 - (INT 71h)
|
|
IRQ9_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 10 - (INT 72h)
|
|
IRQ10_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 11 - (INT 73h)
|
|
IRQ11_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
IRQ12_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 13 (Floating point error) - (INT 75h)
|
|
IRQ13_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 14 (Secondary IDE) - (INT 76h)
|
|
IRQ14_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
# IRQ 15 (Primary IDE) - (INT 77h)
|
|
IRQ15_SEL equ $-IDT_BASE
|
|
dw 0 # offset 15:0
|
|
dw SYS_CODE_SEL # selector 15:0
|
|
db 0 # 0 for interrupt gate
|
|
db 0eh OR 80h # (10001110)type = 386 interrupt gate, present
|
|
dw 0 # offset 31:16
|
|
|
|
db (1 * 8) dup(0)
|
|
|
|
**/
|
|
IDT_END:
|