audk/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs
Shifei Lu 5374d621c5 Add definitions for Protected Region 1 register.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shifei Lu <shifeix.a.lu@intel.com>
Reviewed-by: David Wei <david.wei@intel.com> 


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17617 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-11 02:16:41 +00:00
..
PchRegsHda.h
PchRegsLpss.h
PchRegsPcie.h
PchRegsPcu.h Add code to identify D0 stepping ValleyView SoC. 2015-03-10 03:16:48 +00:00
PchRegsRcrb.h
PchRegsSata.h
PchRegsScc.h
PchRegsSmbus.h
PchRegsSpi.h Add definitions for Protected Region 1 register. 2015-06-11 02:16:41 +00:00
PchRegsUsb.h