mirror of https://github.com/acidanthera/audk.git
267 lines
9.9 KiB
C
267 lines
9.9 KiB
C
/**
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**/
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/**
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Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@file
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Spi.h
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@brief
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This file defines the EFI SPI Protocol which implements the
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Intel(R) ICH SPI Host Controller Compatibility Interface.
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**/
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#ifndef _EFI_SPI_H_
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#define _EFI_SPI_H_
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//
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#define EFI_SPI_PROTOCOL_GUID \
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{ \
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0x1156efc6, 0xea32, 0x4396, 0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13 \
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}
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#define EFI_SMM_SPI_PROTOCOL_GUID \
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{ \
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0xD9072C35, 0xEB8F, 0x43ad, 0xA2, 0x20, 0x34, 0xD4, 0x0E, 0x2A, 0x82, 0x85 \
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}
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extern EFI_GUID gEfiSpiProtocolGuid;
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extern EFI_GUID gEfiSmmSpiProtocolGuid;
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///
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/// Forward reference for ANSI C compatibility
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///
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typedef struct _EFI_SPI_PROTOCOL EFI_SPI_PROTOCOL;
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///
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/// SPI protocol data structures and definitions
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///
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///
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/// Number of Prefix Opcodes allowed on the SPI interface
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///
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#define SPI_NUM_PREFIX_OPCODE 2
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///
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/// Number of Opcodes in the Opcode Menu
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///
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#define SPI_NUM_OPCODE 8
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///
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/// Opcode Type
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/// EnumSpiOpcodeCommand: Command without address
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/// EnumSpiOpcodeRead: Read with address
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/// EnumSpiOpcodeWrite: Write with address
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///
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typedef enum {
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EnumSpiOpcodeReadNoAddr,
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EnumSpiOpcodeWriteNoAddr,
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EnumSpiOpcodeRead,
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EnumSpiOpcodeWrite,
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EnumSpiOpcodeMax
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} SPI_OPCODE_TYPE;
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typedef enum {
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EnumSpiCycle20MHz,
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EnumSpiCycle33MHz,
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EnumSpiCycle66MHz, /// Not supported by VLV
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EnumSpiCycle50MHz,
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EnumSpiCycleMax
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} SPI_CYCLE_FREQUENCY;
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typedef enum {
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EnumSpiRegionAll,
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EnumSpiRegionBios,
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EnumSpiRegionSeC,
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EnumSpiRegionDescriptor,
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EnumSpiRegionPlatformData,
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EnumSpiRegionMax
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} SPI_REGION_TYPE;
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///
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/// Hardware Sequencing required operations (as listed in Valleyview EDS "Hardware
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/// Sequencing Commands and Opcode Requirements"
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///
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typedef enum {
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EnumSpiOperationWriteStatus,
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EnumSpiOperationProgramData_1_Byte,
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EnumSpiOperationProgramData_64_Byte,
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EnumSpiOperationReadData,
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EnumSpiOperationWriteDisable,
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EnumSpiOperationReadStatus,
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EnumSpiOperationWriteEnable,
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EnumSpiOperationFastRead,
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EnumSpiOperationEnableWriteStatus,
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EnumSpiOperationErase_256_Byte,
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EnumSpiOperationErase_4K_Byte,
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EnumSpiOperationErase_8K_Byte,
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EnumSpiOperationErase_64K_Byte,
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EnumSpiOperationFullChipErase,
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EnumSpiOperationJedecId,
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EnumSpiOperationDualOutputFastRead,
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EnumSpiOperationDiscoveryParameters,
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EnumSpiOperationOther,
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EnumSpiOperationMax
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} SPI_OPERATION;
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///
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/// SPI Command Configuration
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/// Frequency The expected frequency to be used (value to be programmed to the SSFC
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/// Register)
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/// Operation Which Hardware Sequencing required operation this opcode respoinds to.
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/// The required operations are listed in EDS Table 5-55: "Hardware
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/// Sequencing Commands and Opcode Requirements"
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/// If the opcode does not corresponds to any operation listed, use
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/// EnumSpiOperationOther, and provides TYPE and Code for it in
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/// SpecialOpcodeEntry.
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///
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typedef struct _SPI_OPCODE_MENU_ENTRY {
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SPI_OPCODE_TYPE Type;
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UINT8 Code;
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SPI_CYCLE_FREQUENCY Frequency;
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SPI_OPERATION Operation;
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} SPI_OPCODE_MENU_ENTRY;
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//
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// Initialization data table loaded to the SPI host controller
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// VendorId Vendor ID of the SPI device
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// DeviceId0 Device ID0 of the SPI device
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// DeviceId1 Device ID1 of the SPI device
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// PrefixOpcode Prefix opcodes which are loaded into the SPI host controller
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// OpcodeMenu Opcodes which are loaded into the SPI host controller Opcode Menu
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// BiosStartOffset The offset of the start of the BIOS image relative to the flash device.
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// Please note this is a Flash Linear Address, NOT a memory space address.
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// This value is platform specific and depends on the system flash map.
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// This value is only used on non Descriptor mode.
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// BiosSize The the BIOS Image size in flash. This value is platform specific
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// and depends on the system flash map. Please note BIOS Image size may
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// be smaller than BIOS Region size (in Descriptor Mode) or the flash size
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// (in Non Descriptor Mode), and in this case, BIOS Image is supposed to be
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// placed at the top end of the BIOS Region (in Descriptor Mode) or the flash
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// (in Non Descriptor Mode)
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//
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typedef struct _SPI_INIT_TABLE {
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UINT8 VendorId;
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UINT8 DeviceId0;
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UINT8 DeviceId1;
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UINT8 PrefixOpcode[SPI_NUM_PREFIX_OPCODE];
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SPI_OPCODE_MENU_ENTRY OpcodeMenu[SPI_NUM_OPCODE];
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UINTN BiosStartOffset;
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UINTN BiosSize;
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} SPI_INIT_TABLE;
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//
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// Protocol member functions
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//
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SPI_INIT) (
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IN EFI_SPI_PROTOCOL * This,
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IN SPI_INIT_TABLE * InitTable
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);
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/**
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@brief
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Initializes the host controller to execute SPI commands.
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@param[in] This Pointer to the EFI_SPI_PROTOCOL instance.
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@param[in] InitData Pointer to caller-allocated buffer containing the SPI
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interface initialization table.
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@retval EFI_SUCCESS Opcode initialization on the SPI host controller completed.
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@retval EFI_ACCESS_DENIED The SPI configuration interface is locked.
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@retval EFI_OUT_OF_RESOURCES Not enough resource available to initialize the device.
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@retval EFI_DEVICE_ERROR Device error, operation failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SPI_LOCK) (
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IN EFI_SPI_PROTOCOL * This
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);
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/**
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@brief
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Initializes the host controller to execute SPI commands.
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@param[in] This Pointer to the EFI_SPI_PROTOCOL instance.
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@param[in] InitData Pointer to caller-allocated buffer containing the SPI
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interface initialization table.
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@retval EFI_SUCCESS Opcode initialization on the SPI host controller completed.
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@retval EFI_ACCESS_DENIED The SPI configuration interface is locked.
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@retval EFI_OUT_OF_RESOURCES Not enough resource available to initialize the device.
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@retval EFI_DEVICE_ERROR Device error, operation failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SPI_EXECUTE) (
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IN EFI_SPI_PROTOCOL * This,
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IN UINT8 OpcodeIndex,
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IN UINT8 PrefixOpcodeIndex,
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IN BOOLEAN DataCycle,
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IN BOOLEAN Atomic,
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IN BOOLEAN ShiftOut,
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IN UINTN Address,
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IN UINT32 DataByteCount,
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IN OUT UINT8 *Buffer,
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IN SPI_REGION_TYPE SpiRegionType
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);
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/**
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@brief
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Execute SPI commands from the host controller.
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@param[in] This Pointer to the EFI_SPI_PROTOCOL instance.
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@param[in] OpcodeIndex Index of the command in the OpCode Menu.
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@param[in] PrefixOpcodeIndex Index of the first command to run when in an atomic cycle sequence.
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@param[in] DataCycle TRUE if the SPI cycle contains data
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@param[in] Atomic TRUE if the SPI cycle is atomic and interleave cycles are not allowed.
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@param[in] ShiftOut If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.
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@param[in] Address In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform
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Region, this value specifies the offset from the Region Base; for BIOS Region,
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this value specifies the offset from the start of the BIOS Image. In Non
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Descriptor Mode, this value specifies the offset from the start of the BIOS Image.
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Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor
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Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is
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supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or
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the flash (in Non Descriptor Mode)
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@param[in] DataByteCount Number of bytes in the data portion of the SPI cycle.
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@param[in] Buffer Pointer to caller-allocated buffer containing the dada received or sent during the SPI cycle.
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@param[in] SpiRegionType SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,
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EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in
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Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode
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and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative
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to base of the 1st flash device (i.e., it is a Flash Linear Address).
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@retval EFI_SUCCESS Command succeed.
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@retval EFI_INVALID_PARAMETER The parameters specified are not valid.
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@exception EFI_UNSUPPORTED Command not supported.
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@retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
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**/
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///
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/// Protocol definition
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///
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struct _EFI_SPI_PROTOCOL {
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EFI_SPI_INIT Init;
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EFI_SPI_LOCK Lock;
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EFI_SPI_EXECUTE Execute;
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};
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#endif
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