Olivier Martin ec17f0f56a ArmPkg/CpuDxe: Stack Pointer is not 8-bytes aligned in AArch32 interrupt handling ... See section "2.1 The need to align SP to a multiple of 8 at conforming call sites" in "Advisory Note. SP must be 8-byte aligned on entry to AAPCS-conforming functions" Source: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15553 6f19259b-4bc3-4df7-8a09-765794883524		2014-06-03 16:42:18 +00:00
..
ArmCpuLib	ArmPkg/ArmCpuLib: Added A57 Errata 806969	2014-03-26 19:35:17 +00:00
ArmGic	ARM Packages: Renamed PL390Gic driver into ArmGic driver	2013-10-29 06:36:34 +00:00
CpuDxe	ArmPkg/CpuDxe: Stack Pointer is not 8-bytes aligned in AArch32 interrupt handling	2014-06-03 16:42:18 +00:00
CpuPei	ArmPlatformPkg/ArmVExpressPkg: Removed unused PCDs declaration from INF file	2013-11-28 21:37:10 +00:00
TimerDxe	ArmPkg: Added Aarch64 support	2013-07-18 18:07:46 +00:00