mirror of https://github.com/acidanthera/audk.git
174 lines
4.2 KiB
NASM
174 lines
4.2 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SecEntry.asm
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;
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; Abstract:
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;
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; This is the code that calls TempRamInit API from FSP binary and passes
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; control into PEI core.
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;
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;------------------------------------------------------------------------------
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#include "Fsp.h"
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IA32_CR4_OSFXSR equ 200h
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IA32_CR4_OSXMMEXCPT equ 400h
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IA32_CR0_MP equ 2h
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IA32_CPUID_SSE2 equ 02000000h
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IA32_CPUID_SSE2_B equ 26
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SECTION .text
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extern ASM_PFX(CallPeiCoreEntryPoint)
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extern ASM_PFX(FsptUpdDataPtr)
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; Pcds
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extern ASM_PFX(PcdGet32 (PcdFsptBaseAddress))
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;----------------------------------------------------------------------------
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;
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; Procedure: _ModuleEntryPoint
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;
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; Input: None
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;
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; Output: None
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;
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; Destroys: Assume all registers
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;
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; Description:
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;
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; Call TempRamInit API from FSP binary. After TempRamInit done, pass
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; control into PEI core.
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;
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; Return: None
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;
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; MMX Usage:
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; MM0 = BIST State
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;
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;----------------------------------------------------------------------------
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BITS 64
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align 16
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global ASM_PFX(ModuleEntryPoint)
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ASM_PFX(ModuleEntryPoint):
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fninit ; clear any pending Floating point exceptions
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;
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; Store the BIST value in mm0
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;
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movd mm0, eax
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; Find the fsp info header
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mov rax, ASM_PFX(PcdGet32 (PcdFsptBaseAddress))
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mov edi, [eax]
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mov eax, dword [edi + FVH_SIGINATURE_OFFSET]
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cmp eax, FVH_SIGINATURE_VALID_VALUE
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jnz FspHeaderNotFound
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xor eax, eax
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mov ax, word [edi + FVH_EXTHEADER_OFFSET_OFFSET]
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cmp ax, 0
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jnz FspFvExtHeaderExist
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xor eax, eax
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mov ax, word [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header
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add edi, eax
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jmp FspCheckFfsHeader
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FspFvExtHeaderExist:
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add edi, eax
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mov eax, dword [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header
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add edi, eax
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; Round up to 8 byte alignment
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mov eax, edi
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and al, 07h
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jz FspCheckFfsHeader
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and edi, 0FFFFFFF8h
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add edi, 08h
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FspCheckFfsHeader:
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; Check the ffs guid
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mov eax, dword [edi]
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cmp eax, FSP_HEADER_GUID_DWORD1
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jnz FspHeaderNotFound
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mov eax, dword [edi + 4]
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cmp eax, FSP_HEADER_GUID_DWORD2
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jnz FspHeaderNotFound
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mov eax, dword [edi + 8]
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cmp eax, FSP_HEADER_GUID_DWORD3
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jnz FspHeaderNotFound
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mov eax, dword [edi + 0Ch]
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cmp eax, FSP_HEADER_GUID_DWORD4
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jnz FspHeaderNotFound
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add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header
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; Check the section type as raw section
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mov al, byte [edi + SECTION_HEADER_TYPE_OFFSET]
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cmp al, 019h
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jnz FspHeaderNotFound
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add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
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jmp FspHeaderFound
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FspHeaderNotFound:
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jmp $
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FspHeaderFound:
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; Get the fsp TempRamInit Api address
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mov eax, dword [edi + FSP_HEADER_IMAGEBASE_OFFSET]
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add eax, dword [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
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; Pass Fsp T Upd pointer as Input parameter
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mov rcx, ASM_PFX(FsptUpdDataPtr)
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; Setup the hardcode stack
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mov rsp, TempRamInitStack
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; Call the fsp TempRamInit Api
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jmp rax
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TempRamInitDone:
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cmp rax, 0800000000000000Eh ; Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
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je CallSecFspInit ; If microcode not found, don't hang, but continue.
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cmp rax, 0 ; Check if EFI_SUCCESS returned.
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jnz FspApiFailed
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; RDX: start of range
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; R8: end of range
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CallSecFspInit:
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mov r8, rdx
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mov rdx, rcx
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xor ecx, ecx ; zero - no Hob List Yet
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mov rsp, r8
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;
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; Per X64 calling convention, make sure RSP is 16-byte aligned.
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;
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mov rax, rsp
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and rax, 0fh
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sub rsp, rax
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call ASM_PFX(CallPeiCoreEntryPoint)
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FspApiFailed:
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jmp $
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align 10h
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TempRamInitStack:
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DQ TempRamInitDone
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