mirror of https://github.com/acidanthera/audk.git
82 lines
2.2 KiB
C
82 lines
2.2 KiB
C
/** @file
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Function to create page talbe.
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Only create page table for x64, and leave the CreatePageTable empty for Ia32.
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Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/CpuPageTableLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Base.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseLib.h>
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/**
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Create 1:1 mapping page table in reserved memory to map the specified address range.
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@param[in] LinearAddress The start of the linear address range.
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@param[in] Length The length of the linear address range.
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@return The page table to be created.
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**/
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UINTN
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CreatePageTable (
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IN UINTN Address,
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IN UINTN Length
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)
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{
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EFI_STATUS Status;
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VOID *PageTableBuffer;
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UINTN PageTableBufferSize;
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UINTN PageTable;
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PAGING_MODE PagingMode;
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IA32_CR4 Cr4;
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IA32_MAP_ATTRIBUTE MapAttribute;
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IA32_MAP_ATTRIBUTE MapMask;
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MapAttribute.Uint64 = Address;
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MapAttribute.Bits.Present = 1;
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MapAttribute.Bits.ReadWrite = 1;
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MapMask.Uint64 = MAX_UINT64;
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PageTable = 0;
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PageTableBufferSize = 0;
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Cr4.UintN = AsmReadCr4 ();
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if (Cr4.Bits.LA57 == 1) {
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PagingMode = Paging5Level;
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} else {
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PagingMode = Paging4Level;
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}
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Status = PageTableMap (
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&PageTable,
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PagingMode,
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NULL,
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&PageTableBufferSize,
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Address,
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Length,
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&MapAttribute,
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&MapMask,
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NULL
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);
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ASSERT (Status == EFI_BUFFER_TOO_SMALL);
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DEBUG ((DEBUG_INFO, "AP Page Table Buffer Size = %x\n", PageTableBufferSize));
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PageTableBuffer = AllocateReservedPages (EFI_SIZE_TO_PAGES (PageTableBufferSize));
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ASSERT (PageTableBuffer != NULL);
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Status = PageTableMap (
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&PageTable,
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PagingMode,
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PageTableBuffer,
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&PageTableBufferSize,
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Address,
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Length,
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&MapAttribute,
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&MapMask,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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return PageTable;
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}
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