Evan Lloyd b2d0e0c51a ArmPkg: Add isb when setting SCR
Some updates to SCR can cause a problem which manifests as an undefined opcode exception.
This may be when a speculative secure instruction fetch happens after the NS bit is set.
An isb is required to make the register change take effect fully.

Contributed-under: Tianocore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <Evan.Lloyd@arm.com>
Reviewed-by: Sami Mujawar <Sami.Mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-02-03 18:42:21 +00:00
2016-02-03 18:42:21 +00:00
2014-10-14 16:08:15 +00:00
2014-10-14 16:08:15 +00:00
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Acidanthera UEFI Development Kit based on EDK II edk2-stable202405
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