mirror of https://github.com/acidanthera/audk.git
779 lines
19 KiB
C
779 lines
19 KiB
C
/** @file
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Copyright (c) 2008-2009, Apple Inc. All rights reserved.
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "Flash.h"
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NAND_PART_INFO_TABLE gNandPartInfoTable[1] = {
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{ 0x2C, 0xBA, 17, 11 }
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};
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NAND_FLASH_INFO *gNandFlashInfo = NULL;
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UINT8 *gEccCode;
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UINTN gNum512BytesChunks = 0;
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//
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// Device path for SemiHosting. It contains our autogened Caller ID GUID.
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//
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typedef struct {
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VENDOR_DEVICE_PATH Guid;
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EFI_DEVICE_PATH_PROTOCOL End;
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} FLASH_DEVICE_PATH;
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FLASH_DEVICE_PATH gDevicePath = {
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{
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{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, sizeof (VENDOR_DEVICE_PATH), 0 },
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EFI_CALLER_ID_GUID
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},
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{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, sizeof (EFI_DEVICE_PATH_PROTOCOL), 0}
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};
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//Actual page address = Column address + Page address + Block address.
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UINTN
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GetActualPageAddressInBytes (
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UINTN BlockIndex,
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UINTN PageIndex
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)
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{
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//BlockAddressStart = Start of the Block address in actual NAND
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//PageAddressStart = Start of the Page address in actual NAND
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return ((BlockIndex << gNandFlashInfo->BlockAddressStart) + (PageIndex << gNandFlashInfo->PageAddressStart));
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}
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VOID
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NandSendCommand (
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UINT8 Command
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)
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{
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MmioWrite16(GPMC_NAND_COMMAND_0, Command);
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}
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VOID
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NandSendAddress (
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UINT8 Address
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)
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{
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MmioWrite16(GPMC_NAND_ADDRESS_0, Address);
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}
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UINT16
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NandReadStatus (
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VOID
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)
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{
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//Send READ STATUS command
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NandSendCommand(READ_STATUS_CMD);
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//Read status.
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return MmioRead16(GPMC_NAND_DATA_0);
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}
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VOID
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NandSendAddressCycles (
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UINTN Address
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)
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{
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//Column address
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NandSendAddress(Address & 0xff);
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Address >>= 8;
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//Column address
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NandSendAddress(Address & 0x07);
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Address >>= 3;
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//Page and Block address
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NandSendAddress(Address & 0xff);
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Address >>= 8;
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//Block address
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NandSendAddress(Address & 0xff);
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Address >>= 8;
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//Block address
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NandSendAddress(Address & 0x01);
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}
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VOID
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GpmcInit (
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VOID
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)
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{
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//Enable Smart-idle mode.
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MmioWrite32 (GPMC_SYSCONFIG, SMARTIDLEMODE);
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//Set IRQSTATUS and IRQENABLE to the reset value
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MmioWrite32 (GPMC_IRQSTATUS, 0x0);
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MmioWrite32 (GPMC_IRQENABLE, 0x0);
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//Disable GPMC timeout control.
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MmioWrite32 (GPMC_TIMEOUT_CONTROL, TIMEOUTDISABLE);
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//Set WRITEPROTECT bit to enable write access.
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MmioWrite32 (GPMC_CONFIG, WRITEPROTECT_HIGH);
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//NOTE: Following GPMC_CONFIGi_0 register settings are taken from u-boot memory dump.
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MmioWrite32 (GPMC_CONFIG1_0, DEVICETYPE_NAND | DEVICESIZE_X16);
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MmioWrite32 (GPMC_CONFIG2_0, CSRDOFFTIME | CSWROFFTIME);
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MmioWrite32 (GPMC_CONFIG3_0, ADVRDOFFTIME | ADVWROFFTIME);
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MmioWrite32 (GPMC_CONFIG4_0, OEONTIME | OEOFFTIME | WEONTIME | WEOFFTIME);
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MmioWrite32 (GPMC_CONFIG5_0, RDCYCLETIME | WRCYCLETIME | RDACCESSTIME | PAGEBURSTACCESSTIME);
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MmioWrite32 (GPMC_CONFIG6_0, WRACCESSTIME | WRDATAONADMUXBUS | CYCLE2CYCLEDELAY | CYCLE2CYCLESAMECSEN);
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MmioWrite32 (GPMC_CONFIG7_0, MASKADDRESS_128MB | CSVALID | BASEADDRESS);
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}
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EFI_STATUS
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NandDetectPart (
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VOID
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)
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{
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UINT8 NandInfo = 0;
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UINT8 PartInfo[5];
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UINTN Index;
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BOOLEAN Found = FALSE;
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//Send READ ID command
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NandSendCommand(READ_ID_CMD);
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//Send one address cycle.
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NandSendAddress(0);
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//Read 5-bytes to idenfity code programmed into the NAND flash devices.
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//BYTE 0 = Manufacture ID
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//Byte 1 = Device ID
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//Byte 2, 3, 4 = Nand part specific information (Page size, Block size etc)
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for (Index = 0; Index < sizeof(PartInfo); Index++) {
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PartInfo[Index] = MmioRead16(GPMC_NAND_DATA_0);
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}
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//Check if the ManufactureId and DeviceId are part of the currently supported nand parts.
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for (Index = 0; Index < sizeof(gNandPartInfoTable)/sizeof(NAND_PART_INFO_TABLE); Index++) {
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if (gNandPartInfoTable[Index].ManufactureId == PartInfo[0] && gNandPartInfoTable[Index].DeviceId == PartInfo[1]) {
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gNandFlashInfo->BlockAddressStart = gNandPartInfoTable[Index].BlockAddressStart;
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gNandFlashInfo->PageAddressStart = gNandPartInfoTable[Index].PageAddressStart;
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Found = TRUE;
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break;
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}
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}
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if (Found == FALSE) {
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DEBUG ((EFI_D_ERROR, "Nand part is not currently supported. Manufacture id: %x, Device id: %x\n", PartInfo[0], PartInfo[1]));
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return EFI_NOT_FOUND;
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}
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//Populate NAND_FLASH_INFO based on the result of READ ID command.
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gNandFlashInfo->ManufactureId = PartInfo[0];
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gNandFlashInfo->DeviceId = PartInfo[1];
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NandInfo = PartInfo[3];
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if (PAGE_SIZE(NandInfo) == PAGE_SIZE_2K_VAL) {
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gNandFlashInfo->PageSize = PAGE_SIZE_2K;
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} else {
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DEBUG ((EFI_D_ERROR, "Unknown Page size.\n"));
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return EFI_DEVICE_ERROR;
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}
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if (SPARE_AREA_SIZE(NandInfo) == SPARE_AREA_SIZE_64B_VAL) {
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gNandFlashInfo->SparePageSize = SPARE_AREA_SIZE_64B;
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} else {
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DEBUG ((EFI_D_ERROR, "Unknown Spare area size.\n"));
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return EFI_DEVICE_ERROR;
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}
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if (BLOCK_SIZE(NandInfo) == BLOCK_SIZE_128K_VAL) {
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gNandFlashInfo->BlockSize = BLOCK_SIZE_128K;
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} else {
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DEBUG ((EFI_D_ERROR, "Unknown Block size.\n"));
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return EFI_DEVICE_ERROR;
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}
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if (ORGANIZATION(NandInfo) == ORGANIZATION_X8) {
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gNandFlashInfo->Organization = 0;
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} else if (ORGANIZATION(NandInfo) == ORGANIZATION_X16) {
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gNandFlashInfo->Organization = 1;
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}
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//Calculate total number of blocks.
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gNandFlashInfo->NumPagesPerBlock = DivU64x32(gNandFlashInfo->BlockSize, gNandFlashInfo->PageSize);
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return EFI_SUCCESS;
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}
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VOID
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NandConfigureEcc (
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VOID
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)
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{
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//Define ECC size 0 and size 1 to 512 bytes
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MmioWrite32 (GPMC_ECC_SIZE_CONFIG, (ECCSIZE0_512BYTES | ECCSIZE1_512BYTES));
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}
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VOID
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NandEnableEcc (
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VOID
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)
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{
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//Clear all the ECC result registers and select ECC result register 1
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MmioWrite32 (GPMC_ECC_CONTROL, (ECCCLEAR | ECCPOINTER_REG1));
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//Enable ECC engine on CS0
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MmioWrite32 (GPMC_ECC_CONFIG, (ECCENABLE | ECCCS_0 | ECC16B));
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}
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VOID
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NandDisableEcc (
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VOID
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)
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{
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//Turn off ECC engine.
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MmioWrite32 (GPMC_ECC_CONFIG, ECCDISABLE);
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}
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VOID
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NandCalculateEcc (
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VOID
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)
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{
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UINTN Index;
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UINTN EccResultRegister;
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UINTN EccResult;
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//Capture 32-bit ECC result for each 512-bytes chunk.
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//In our case PageSize is 2K so read ECC1-ECC4 result registers and
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//generate total of 12-bytes of ECC code for the particular page.
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EccResultRegister = GPMC_ECC1_RESULT;
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for (Index = 0; Index < gNum512BytesChunks; Index++) {
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EccResult = MmioRead32(EccResultRegister);
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//Calculate ECC code from 32-bit ECC result value.
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//NOTE: Following calculation is not part of TRM. We got this information
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//from Beagleboard mailing list.
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gEccCode[Index * 3] = EccResult & 0xFF;
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gEccCode[(Index * 3) + 1] = (EccResult >> 16) & 0xFF;
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gEccCode[(Index * 3) + 2] = (((EccResult >> 20) & 0xF0) | ((EccResult >> 8) & 0x0F));
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//Point to next ECC result register.
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EccResultRegister += 4;
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}
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}
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EFI_STATUS
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NandReadPage (
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IN UINTN BlockIndex,
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IN UINTN PageIndex,
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OUT VOID *Buffer,
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OUT UINT8 *SpareBuffer
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)
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{
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UINTN Address;
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UINTN Index;
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UINTN NumMainAreaWords = (gNandFlashInfo->PageSize/2);
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UINTN NumSpareAreaWords = (gNandFlashInfo->SparePageSize/2);
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UINT16 *MainAreaWordBuffer = Buffer;
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UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;
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UINTN Timeout = MAX_RETRY_COUNT;
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//Generate device address in bytes to access specific block and page index
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Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);
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//Send READ command
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NandSendCommand(PAGE_READ_CMD);
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//Send 5 Address cycles to access specific device address
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NandSendAddressCycles(Address);
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//Send READ CONFIRM command
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NandSendCommand(PAGE_READ_CONFIRM_CMD);
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//Poll till device is busy.
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while (Timeout) {
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if ((NandReadStatus() & NAND_READY) == NAND_READY) {
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break;
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}
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Timeout--;
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}
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if (Timeout == 0) {
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DEBUG ((EFI_D_ERROR, "Read page timed out.\n"));
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return EFI_TIMEOUT;
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}
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//Reissue READ command
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NandSendCommand(PAGE_READ_CMD);
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//Enable ECC engine.
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NandEnableEcc();
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//Read data into the buffer.
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for (Index = 0; Index < NumMainAreaWords; Index++) {
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*MainAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);
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}
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//Read spare area into the buffer.
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for (Index = 0; Index < NumSpareAreaWords; Index++) {
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*SpareAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);
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}
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//Calculate ECC.
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NandCalculateEcc();
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//Turn off ECC engine.
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NandDisableEcc();
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//Perform ECC correction.
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//Need to implement..
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return EFI_SUCCESS;
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}
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EFI_STATUS
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NandWritePage (
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IN UINTN BlockIndex,
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IN UINTN PageIndex,
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OUT VOID *Buffer,
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IN UINT8 *SpareBuffer
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)
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{
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UINTN Address;
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UINT16 *MainAreaWordBuffer = Buffer;
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UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;
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UINTN Index;
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UINTN NandStatus;
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UINTN Timeout = MAX_RETRY_COUNT;
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//Generate device address in bytes to access specific block and page index
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Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);
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//Send SERIAL DATA INPUT command
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NandSendCommand(PROGRAM_PAGE_CMD);
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//Send 5 Address cycles to access specific device address
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NandSendAddressCycles(Address);
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//Enable ECC engine.
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NandEnableEcc();
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//Data input from Buffer
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for (Index = 0; Index < (gNandFlashInfo->PageSize/2); Index++) {
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MmioWrite16(GPMC_NAND_DATA_0, *MainAreaWordBuffer++);
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//After each write access, device has to wait to accept data.
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//Currently we may not be programming proper timing parameters to
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//the GPMC_CONFIGi_0 registers and we would need to figure that out.
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//Without following delay, page programming fails.
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gBS->Stall(1);
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}
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//Calculate ECC.
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NandCalculateEcc();
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//Turn off ECC engine.
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NandDisableEcc();
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//Prepare Spare area buffer with ECC codes.
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SetMem(SpareBuffer, gNandFlashInfo->SparePageSize, 0xFF);
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CopyMem(&SpareBuffer[ECC_POSITION], gEccCode, gNum512BytesChunks * 3);
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//Program spare area with calculated ECC.
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for (Index = 0; Index < (gNandFlashInfo->SparePageSize/2); Index++) {
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MmioWrite16(GPMC_NAND_DATA_0, *SpareAreaWordBuffer++);
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}
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//Send PROGRAM command
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NandSendCommand(PROGRAM_PAGE_CONFIRM_CMD);
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//Poll till device is busy.
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while (Timeout) {
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NandStatus = NandReadStatus();
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if ((NandStatus & NAND_READY) == NAND_READY) {
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break;
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}
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Timeout--;
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}
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if (Timeout == 0) {
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DEBUG ((EFI_D_ERROR, "Program page timed out.\n"));
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return EFI_TIMEOUT;
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}
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//Bit0 indicates Pass/Fail status
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if (NandStatus & NAND_FAILURE) {
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return EFI_DEVICE_ERROR;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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NandEraseBlock (
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IN UINTN BlockIndex
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)
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{
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UINTN Address;
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UINTN NandStatus;
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UINTN Timeout = MAX_RETRY_COUNT;
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//Generate device address in bytes to access specific block and page index
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Address = GetActualPageAddressInBytes(BlockIndex, 0);
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//Send ERASE SETUP command
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NandSendCommand(BLOCK_ERASE_CMD);
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//Send 3 address cycles to device to access Page address and Block address
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Address >>= 11; //Ignore column addresses
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NandSendAddress(Address & 0xff);
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Address >>= 8;
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NandSendAddress(Address & 0xff);
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Address >>= 8;
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NandSendAddress(Address & 0xff);
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//Send ERASE CONFIRM command
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NandSendCommand(BLOCK_ERASE_CONFIRM_CMD);
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//Poll till device is busy.
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while (Timeout) {
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NandStatus = NandReadStatus();
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if ((NandStatus & NAND_READY) == NAND_READY) {
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break;
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}
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Timeout--;
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gBS->Stall(1);
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}
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if (Timeout == 0) {
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DEBUG ((EFI_D_ERROR, "Erase block timed out for Block: %d.\n", BlockIndex));
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return EFI_TIMEOUT;
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}
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//Bit0 indicates Pass/Fail status
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if (NandStatus & NAND_FAILURE) {
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return EFI_DEVICE_ERROR;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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NandReadBlock (
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IN UINTN StartBlockIndex,
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IN UINTN EndBlockIndex,
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OUT VOID *Buffer,
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OUT VOID *SpareBuffer
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)
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{
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UINTN BlockIndex;
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UINTN PageIndex;
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EFI_STATUS Status = EFI_SUCCESS;
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for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {
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//For each block read number of pages
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for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {
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Status = NandReadPage(BlockIndex, PageIndex, Buffer, SpareBuffer);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);
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}
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}
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return Status;
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}
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EFI_STATUS
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NandWriteBlock (
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IN UINTN StartBlockIndex,
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IN UINTN EndBlockIndex,
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OUT VOID *Buffer,
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OUT VOID *SpareBuffer
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)
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{
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UINTN BlockIndex;
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UINTN PageIndex;
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EFI_STATUS Status = EFI_SUCCESS;
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for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {
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//Page programming.
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for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {
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Status = NandWritePage(BlockIndex, PageIndex, Buffer, SpareBuffer);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);
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}
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}
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return Status;
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}
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EFI_STATUS
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EFIAPI
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NandFlashReset (
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IN EFI_BLOCK_IO_PROTOCOL *This,
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IN BOOLEAN ExtendedVerification
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)
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{
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UINTN BusyStall = 50; // microSeconds
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UINTN ResetBusyTimeout = (1000000 / BusyStall); // 1 Second
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//Send RESET command to device.
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NandSendCommand(RESET_CMD);
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|
|
//Wait for 1ms before we check status register.
|
|
gBS->Stall(1000);
|
|
|
|
//Check BIT#5 & BIT#6 in Status register to make sure RESET is done.
|
|
while ((NandReadStatus() & NAND_RESET_STATUS) != NAND_RESET_STATUS) {
|
|
|
|
//In case of extended verification, wait for extended amount of time
|
|
//to make sure device is reset.
|
|
if (ExtendedVerification) {
|
|
if (ResetBusyTimeout == 0) {
|
|
return EFI_DEVICE_ERROR;
|
|
}
|
|
|
|
gBS->Stall(BusyStall);
|
|
ResetBusyTimeout--;
|
|
}
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
NandFlashReadBlocks (
|
|
IN EFI_BLOCK_IO_PROTOCOL *This,
|
|
IN UINT32 MediaId,
|
|
IN EFI_LBA Lba,
|
|
IN UINTN BufferSize,
|
|
OUT VOID *Buffer
|
|
)
|
|
{
|
|
UINTN NumBlocks;
|
|
UINTN EndBlockIndex;
|
|
EFI_STATUS Status;
|
|
UINT8 *SpareBuffer = NULL;
|
|
|
|
if (Buffer == NULL) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto exit;
|
|
}
|
|
|
|
if (Lba > LAST_BLOCK) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto exit;
|
|
}
|
|
|
|
if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
|
|
Status = EFI_BAD_BUFFER_SIZE;
|
|
goto exit;
|
|
}
|
|
|
|
NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);
|
|
EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;
|
|
|
|
SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);
|
|
if (SpareBuffer == NULL) {
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
goto exit;
|
|
}
|
|
|
|
//Read block
|
|
Status = NandReadBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);
|
|
if (EFI_ERROR(Status)) {
|
|
DEBUG((EFI_D_ERROR, "Read block fails: %x\n", Status));
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
if (SpareBuffer != NULL) {
|
|
FreePool (SpareBuffer);
|
|
}
|
|
|
|
return Status;
|
|
}
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
NandFlashWriteBlocks (
|
|
IN EFI_BLOCK_IO_PROTOCOL *This,
|
|
IN UINT32 MediaId,
|
|
IN EFI_LBA Lba,
|
|
IN UINTN BufferSize,
|
|
IN VOID *Buffer
|
|
)
|
|
{
|
|
UINTN BlockIndex;
|
|
UINTN NumBlocks;
|
|
UINTN EndBlockIndex;
|
|
EFI_STATUS Status;
|
|
UINT8 *SpareBuffer = NULL;
|
|
|
|
if (Buffer == NULL) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto exit;
|
|
}
|
|
|
|
if (Lba > LAST_BLOCK) {
|
|
Status = EFI_INVALID_PARAMETER;
|
|
goto exit;
|
|
}
|
|
|
|
if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
|
|
Status = EFI_BAD_BUFFER_SIZE;
|
|
goto exit;
|
|
}
|
|
|
|
NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);
|
|
EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;
|
|
|
|
SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);
|
|
if (SpareBuffer == NULL) {
|
|
Status = EFI_OUT_OF_RESOURCES;
|
|
goto exit;
|
|
}
|
|
|
|
// Erase block
|
|
for (BlockIndex = (UINTN)Lba; BlockIndex <= EndBlockIndex; BlockIndex++) {
|
|
Status = NandEraseBlock(BlockIndex);
|
|
if (EFI_ERROR(Status)) {
|
|
DEBUG((EFI_D_ERROR, "Erase block failed. Status: %x\n", Status));
|
|
goto exit;
|
|
}
|
|
}
|
|
|
|
// Program data
|
|
Status = NandWriteBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);
|
|
if (EFI_ERROR(Status)) {
|
|
DEBUG((EFI_D_ERROR, "Block write fails: %x\n", Status));
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
if (SpareBuffer != NULL) {
|
|
FreePool (SpareBuffer);
|
|
}
|
|
|
|
return Status;
|
|
}
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
NandFlashFlushBlocks (
|
|
IN EFI_BLOCK_IO_PROTOCOL *This
|
|
)
|
|
{
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
|
|
|
|
EFI_BLOCK_IO_MEDIA gNandFlashMedia = {
|
|
SIGNATURE_32('n','a','n','d'), // MediaId
|
|
FALSE, // RemovableMedia
|
|
TRUE, // MediaPresent
|
|
FALSE, // LogicalPartition
|
|
FALSE, // ReadOnly
|
|
FALSE, // WriteCaching
|
|
0, // BlockSize
|
|
2, // IoAlign
|
|
0, // Pad
|
|
0 // LastBlock
|
|
};
|
|
|
|
EFI_BLOCK_IO_PROTOCOL BlockIo =
|
|
{
|
|
EFI_BLOCK_IO_INTERFACE_REVISION, // Revision
|
|
&gNandFlashMedia, // *Media
|
|
NandFlashReset, // Reset
|
|
NandFlashReadBlocks, // ReadBlocks
|
|
NandFlashWriteBlocks, // WriteBlocks
|
|
NandFlashFlushBlocks // FlushBlocks
|
|
};
|
|
|
|
EFI_STATUS
|
|
NandFlashInitialize (
|
|
IN EFI_HANDLE ImageHandle,
|
|
IN EFI_SYSTEM_TABLE *SystemTable
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
|
|
gNandFlashInfo = (NAND_FLASH_INFO *)AllocateZeroPool (sizeof(NAND_FLASH_INFO));
|
|
|
|
//Initialize GPMC module.
|
|
GpmcInit();
|
|
|
|
//Reset NAND part
|
|
NandFlashReset(&BlockIo, FALSE);
|
|
|
|
//Detect NAND part and populate gNandFlashInfo structure
|
|
Status = NandDetectPart ();
|
|
if (EFI_ERROR(Status)) {
|
|
DEBUG((EFI_D_ERROR, "Nand part id detection failure: Status: %x\n", Status));
|
|
return Status;
|
|
}
|
|
|
|
//Count total number of 512Bytes chunk based on the page size.
|
|
if (gNandFlashInfo->PageSize == PAGE_SIZE_512B) {
|
|
gNum512BytesChunks = 1;
|
|
} else if (gNandFlashInfo->PageSize == PAGE_SIZE_2K) {
|
|
gNum512BytesChunks = 4;
|
|
} else if (gNandFlashInfo->PageSize == PAGE_SIZE_4K) {
|
|
gNum512BytesChunks = 8;
|
|
}
|
|
|
|
gEccCode = (UINT8 *)AllocatePool(gNum512BytesChunks * 3);
|
|
if (gEccCode == NULL) {
|
|
return EFI_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
//Configure ECC
|
|
NandConfigureEcc ();
|
|
|
|
//Patch EFI_BLOCK_IO_MEDIA structure.
|
|
gNandFlashMedia.BlockSize = gNandFlashInfo->BlockSize;
|
|
gNandFlashMedia.LastBlock = LAST_BLOCK;
|
|
|
|
//Publish BlockIO.
|
|
Status = gBS->InstallMultipleProtocolInterfaces (
|
|
&ImageHandle,
|
|
&gEfiBlockIoProtocolGuid, &BlockIo,
|
|
&gEfiDevicePathProtocolGuid, &gDevicePath,
|
|
NULL
|
|
);
|
|
return Status;
|
|
}
|
|
|