mirror of https://github.com/acidanthera/audk.git
81 lines
2.8 KiB
NASM
Executable File
81 lines
2.8 KiB
NASM
Executable File
//------------------------------------------------------------------------------
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//------------------------------------------------------------------------------
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <ArmEb/ArmEb.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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EXPORT _ModuleEntryPoint
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PRESERVE8
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AREA ModuleEntryPoint, CODE, READONLY
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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// Turn off remapping NOR to 0. We can now use DRAM in low memory
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// CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
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//MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
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// Enable NEON register in case folks want to use them for optimizations (CopyMem)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
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// Set CPU vectors to 0 (which is currently flash)
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LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
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mcr p15, 0, r0, c12, c0, 0
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isb // Sync changes to control registers
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//
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// Set stack based on PCD values. Need to do it this way to make C code work
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// when it runs from FLASH.
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//
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0) // temp ram base arg 0 TODO: change "stackbase" to "temprambase"
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1) // temp ram size arg 1
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lsr r3, r1, #1 // r4 = size of temp mem / 2
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add r3, r3, r0 // r2 = temp ram base + r4
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mov r13, r3 // result: stack pointer = temp ram base + (size of temp mem / 2)
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// lr points to area in reset vector block containing PEI core address
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ldr r2, [lr] // pei core arg 3
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// move sec startup address into a data register
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r4, StartupAddr
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// jump to SEC C code
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blx r4
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// Call C entry point
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// THIS DOESN'T WORK, WE NEED A LONG JUMP
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// blx CEntryPoint
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ShouldNeverGetHere
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// _CEntryPoint should never return
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b ShouldNeverGetHere
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END
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