mirror of https://github.com/acidanthera/audk.git
351 lines
8.0 KiB
C
351 lines
8.0 KiB
C
/*++
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Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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CpuIA32.h
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Abstract:
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--*/
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#ifndef _CPU_IA32_H
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#define _CPU_IA32_H
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typedef struct {
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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} EFI_CPUID_REGISTER;
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typedef struct {
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UINT32 HeaderVersion;
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UINT32 UpdateRevision;
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UINT32 Date;
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UINT32 ProcessorId;
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UINT32 Checksum;
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UINT32 LoaderRevision;
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UINT32 ProcessorFlags;
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UINT32 DataSize;
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UINT32 TotalSize;
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UINT8 Reserved[12];
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} EFI_CPU_MICROCODE_HEADER;
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typedef struct {
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UINT32 ExtendedSignatureCount;
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UINT32 ExtendedTableChecksum;
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UINT8 Reserved[12];
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} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
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typedef struct {
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UINT32 ProcessorSignature;
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UINT32 ProcessorFlag;
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UINT32 ProcessorChecksum;
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} EFI_CPU_MICROCODE_EXTENDED_TABLE;
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typedef struct {
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UINT32 Stepping : 4;
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UINT32 Model : 4;
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UINT32 Family : 4;
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UINT32 Type : 2;
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UINT32 Reserved1 : 2;
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UINT32 ExtendedModel : 4;
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UINT32 ExtendedFamily : 8;
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UINT32 Reserved2 : 4;
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} EFI_CPU_VERSION;
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#define EFI_CPUID_SIGNATURE 0x0
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#define EFI_CPUID_VERSION_INFO 0x1
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#define EFI_CPUID_CACHE_INFO 0x2
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#define EFI_CPUID_SERIAL_NUMBER 0x3
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#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000
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#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001
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#define EFI_CPUID_BRAND_STRING1 0x80000002
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#define EFI_CPUID_BRAND_STRING2 0x80000003
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#define EFI_CPUID_BRAND_STRING3 0x80000004
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#define EFI_MSR_IA32_PLATFORM_ID 0x17
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#define EFI_MSR_IA32_APIC_BASE 0x1B
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#define EFI_MSR_EBC_HARD_POWERON 0x2A
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#define EFI_MSR_EBC_SOFT_POWERON 0x2B
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#define BINIT_DRIVER_DISABLE 0x40
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#define INTERNAL_MCERR_DISABLE 0x20
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#define INITIATOR_MCERR_DISABLE 0x10
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#define EFI_MSR_EBC_FREQUENCY_ID 0x2C
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#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
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#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B
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#define EFI_MSR_PSB_CLOCK_STATUS 0xCD
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#define EFI_APIC_GLOBAL_ENABLE 0x800
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#define EFI_MSR_IA32_MISC_ENABLE 0x1A0
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#define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000
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#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008
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#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004
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#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
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#define FAST_STRING_ENABLE_BIT 0x00000001
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#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200
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#define EFI_CACHE_VARIABLE_MTRR_END 0x20F
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#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF
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#define EFI_CACHE_MTRR_VALID 0x800
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#define EFI_CACHE_FIXED_MTRR_VALID 0x400
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#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
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#define EFI_MSR_VALID_MASK 0xFFFFFFFFF
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#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
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#define EFI_MSR_VALID_EXTENDED_MASK 0xFFFFFFFFFFFFF
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#define EFI_IA32_MTRR_FIX64K_00000 0x250
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#define EFI_IA32_MTRR_FIX16K_80000 0x258
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#define EFI_IA32_MTRR_FIX16K_A0000 0x259
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#define EFI_IA32_MTRR_FIX4K_C0000 0x268
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#define EFI_IA32_MTRR_FIX4K_C8000 0x269
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#define EFI_IA32_MTRR_FIX4K_D0000 0x26A
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#define EFI_IA32_MTRR_FIX4K_D8000 0x26B
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#define EFI_IA32_MTRR_FIX4K_E0000 0x26C
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#define EFI_IA32_MTRR_FIX4K_E8000 0x26D
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#define EFI_IA32_MTRR_FIX4K_F0000 0x26E
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#define EFI_IA32_MTRR_FIX4K_F8000 0x26F
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#define EFI_IA32_MCG_CAP 0x179
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#define EFI_IA32_MCG_CTL 0x17B
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#define EFI_IA32_MC0_CTL 0x400
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#define EFI_IA32_MC0_STATUS 0x401
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#define EFI_IA32_PERF_STATUS 0x198
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#define EFI_IA32_PERF_CTL 0x199
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#define EFI_CACHE_UNCACHEABLE 0
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#define EFI_CACHE_WRITECOMBINING 1
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#define EFI_CACHE_WRITETHROUGH 4
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#define EFI_CACHE_WRITEPROTECTED 5
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#define EFI_CACHE_WRITEBACK 6
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//
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// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
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//
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#define EfiMakeCpuVersion(f, m, s) \
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(((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
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/**
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Halt the Cpu
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiHalt (
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VOID
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);
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/**
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Write back and invalidate the Cpu cache
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiWbinvd (
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VOID
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);
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/**
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Invalidate the Cpu cache
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiInvd (
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VOID
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);
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/**
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Get the Cpu info by excute the CPUID instruction
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@param[in] RegisterInEax The input value to put into register EAX
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@param[in] Regs The Output value
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@retval None
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**/
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VOID
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EFIAPI
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EfiCpuid (
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IN UINT32 RegisterInEax,
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OUT EFI_CPUID_REGISTER *Regs
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);
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/**
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When RegisterInEax != 4, the functionality is the same as EfiCpuid.
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When RegisterInEax == 4, the function return the deterministic cache
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parameters by excuting the CPUID instruction.
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@param[in] RegisterInEax The input value to put into register EAX.
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@param[in] CacheLevel The deterministic cache level.
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@param[in] Regs The Output value.
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@retval None
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**/
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VOID
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EFIAPI
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EfiCpuidExt (
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IN UINT32 RegisterInEax,
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IN UINT32 CacheLevel,
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OUT EFI_CPUID_REGISTER *Regs
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);
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/**
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Read Cpu MSR
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@param[in] Index The index value to select the register
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@retval Return the read data
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**/
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UINT64
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EFIAPI
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EfiReadMsr (
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IN UINT32 Index
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);
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/**
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Write Cpu MSR
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@param[in] Index The index value to select the register
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@param[in] Value The value to write to the selected register
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@retval None
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**/
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VOID
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EFIAPI
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EfiWriteMsr (
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IN UINT32 Index,
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IN UINT64 Value
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);
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/**
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Read Time stamp
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@param[in] None
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@retval Return the read data
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**/
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UINT64
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EFIAPI
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EfiReadTsc (
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VOID
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);
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/**
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Writing back and invalidate the cache,then diable it
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiDisableCache (
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VOID
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);
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/**
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Invalidate the cache,then Enable it
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiEnableCache (
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VOID
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);
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/**
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Get Eflags
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@param[in] None
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@retval Return the Eflags value
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**/
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UINT32
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EFIAPI
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EfiGetEflags (
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VOID
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);
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/**
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Disable Interrupts
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiDisableInterrupts (
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VOID
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);
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/**
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Enable Interrupts
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@param[in] None
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@retval None
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**/
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VOID
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EFIAPI
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EfiEnableInterrupts (
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VOID
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);
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/**
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Extract CPU detail version infomation
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@param[in] FamilyId FamilyId, including ExtendedFamilyId
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@param[in] Model Model, including ExtendedModel
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@param[in] SteppingId SteppingId
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@param[in] Processor Processor
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**/
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VOID
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EFIAPI
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EfiCpuVersion (
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IN UINT16 *FamilyId, OPTIONAL
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IN UINT8 *Model, OPTIONAL
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IN UINT8 *SteppingId, OPTIONAL
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IN UINT8 *Processor OPTIONAL
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);
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#endif
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