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4059386c70
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
/** @file
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Macros to work around lack of Clang support for LDR register, =expr
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __MACRO_IO_LIBV8_H__
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#define __MACRO_IO_LIBV8_H__
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0x8 ;\
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b.gt . ;\
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b.eq 2f ;\
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cbnz SAFE_XREG, 1f ;\
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b . ;// We should never get here
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2 and EL3, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0x8 ;\
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b.gt 3f ;\
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b.eq 2f ;\
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cbnz SAFE_XREG, 1f ;\
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b . ;// We should never get here
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#define _ASM_FUNC(Name, Section) \
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.global Name ; \
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.section #Section, "ax" ; \
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.type Name, %function ; \
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Name:
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#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
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#define MOV32(Reg, Val) \
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movz Reg, (Val) >> 16, lsl #16 ; \
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movk Reg, (Val) & 0xffff
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#define MOV64(Reg, Val) \
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movz Reg, (Val) >> 48, lsl #48 ; \
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movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \
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movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
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movk Reg, (Val) & 0xffff
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#endif // __MACRO_IO_LIBV8_H__
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