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9672cd3056
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
57 lines
2.3 KiB
C
57 lines
2.3 KiB
C
/** @file
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Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _FSP_MEASURE_POINT_ID_H_
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#define _FSP_MEASURE_POINT_ID_H_
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//
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// 0xD0 - 0xEF are reserved for FSP common measure point
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//
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#define FSP_PERF_ID_MRC_INIT_ENTRY 0xD0
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#define FSP_PERF_ID_MRC_INIT_EXIT (FSP_PERF_ID_MRC_INIT_ENTRY + 1)
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#define FSP_PERF_ID_SYSTEM_AGENT_INIT_ENTRY 0xD8
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#define FSP_PERF_ID_SYSTEM_AGENT_INIT_EXIT (FSP_PERF_ID_SYSTEM_AGENT_INIT_ENTRY + 1)
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#define FSP_PERF_ID_PCH_INIT_ENTRY 0xDA
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#define FSP_PERF_ID_PCH_INIT_EXIT (FSP_PERF_ID_PCH_INIT_ENTRY + 1)
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#define FSP_PERF_ID_CPU_INIT_ENTRY 0xE0
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#define FSP_PERF_ID_CPU_INIT_EXIT (FSP_PERF_ID_CPU_INIT_ENTRY + 1)
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#define FSP_PERF_ID_GFX_INIT_ENTRY 0xE8
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#define FSP_PERF_ID_GFX_INIT_EXIT (FSP_PERF_ID_GFX_INIT_ENTRY + 1)
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#define FSP_PERF_ID_ME_INIT_ENTRY 0xEA
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#define FSP_PERF_ID_ME_INIT_EXIT (FSP_PERF_ID_ME_INIT_ENTRY + 1)
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//
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// 0xF0 - 0xFF are reserved for FSP API
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//
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#define FSP_PERF_ID_API_TEMP_RAM_INIT_ENTRY 0xF0
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#define FSP_PERF_ID_API_TEMP_RAM_INIT_EXIT (FSP_PERF_ID_API_TEMP_RAM_INIT_ENTRY + 1)
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#define FSP_PERF_ID_API_FSP_MEMORY_INIT_ENTRY 0xF2
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#define FSP_PERF_ID_API_FSP_MEMORY_INIT_EXIT (FSP_PERF_ID_API_FSP_MEMORY_INIT_ENTRY + 1)
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#define FSP_PERF_ID_API_TEMP_RAM_EXIT_ENTRY 0xF4
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#define FSP_PERF_ID_API_TEMP_RAM_EXIT_EXIT (FSP_PERF_ID_API_TEMP_RAM_EXIT_ENTRY + 1)
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#define FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY 0xF6
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#define FSP_PERF_ID_API_FSP_SILICON_INIT_EXIT (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY + 1)
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#define FSP_PERF_ID_API_NOTIFY_POST_PCI_ENTRY 0xF8
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#define FSP_PERF_ID_API_NOTIFY_POST_PCI_EXIT (FSP_PERF_ID_API_NOTIFY_POST_PCI_ENTRY + 1)
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#define FSP_PERF_ID_API_NOTIFY_READY_TO_BOOT_ENTRY 0xFA
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#define FSP_PERF_ID_API_NOTIFY_READY_TO_BOOT_EXIT (FSP_PERF_ID_API_NOTIFY_READY_TO_BOOT_ENTRY + 1)
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#define FSP_PERF_ID_API_NOTIFY_END_OF_FIRMWARE_ENTRY 0xFC
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#define FSP_PERF_ID_API_NOTIFY_END_OF_FIRMWARE_EXIT (FSP_PERF_ID_API_NOTIFY_END_OF_FIRMWARE_ENTRY + 1)
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#endif
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