mirror of https://github.com/acidanthera/audk.git
ec25e904c7
On some platforms, including Sky Lake and Kaby Lake, the PSIV (Protocol
Speed ID Value) indices are shared between Protocol Speed ID DWORD' in
the extended capabilities registers for both USB2 (Full Speed) and USB3
(Super Speed).
An example can be found below:
XhcCheckUsbPortSpeedUsedPsic: checking for USB2 ext caps
XhciPsivGetPsid: found 3 PSID entries
XhciPsivGetPsid: looking for port speed 1
XhciPsivGetPsid: PSIV 1 PSIE 2 PLT 0 PSIM 12
XhciPsivGetPsid: PSIV 2 PSIE 1 PLT 0 PSIM 1500
XhciPsivGetPsid: PSIV 3 PSIE 2 PLT 0 PSIM 480
XhcCheckUsbPortSpeedUsedPsic: checking for USB3 ext caps
XhciPsivGetPsid: found 3 PSID entries
XhciPsivGetPsid: looking for port speed 1
XhciPsivGetPsid: PSIV 1 PSIE 3 PLT 0 PSIM 5
XhciPsivGetPsid: PSIV 2 PSIE 3 PLT 0 PSIM 10
XhciPsivGetPsid: PSIV 34 PSIE 2 PLT 0 PSIM 1248
The result is edk2 detecting USB2 devices as USB3 devices, which
consequently causes enumeration to fail.
To avoid incorrect detection, check the Compatible Port Offset to find
the starting Port of Root Hubs that support the protocol.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
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||
|---|---|---|
| .. | ||
| EhciDxe | ||
| EhciPei | ||
| IdeBusPei | ||
| IncompatiblePciDeviceSupportDxe | ||
| NonDiscoverablePciDeviceDxe | ||
| NvmExpressDxe | ||
| NvmExpressPei | ||
| PciBusDxe | ||
| PciHostBridgeDxe | ||
| PciSioSerialDxe | ||
| SataControllerDxe | ||
| SdMmcPciHcDxe | ||
| SdMmcPciHcPei | ||
| UfsPciHcDxe | ||
| UfsPciHcPei | ||
| UhciDxe | ||
| UhciPei | ||
| XhciDxe | ||
| XhciPei | ||