mirror of https://github.com/acidanthera/audk.git
293 lines
13 KiB
C
293 lines
13 KiB
C
/** @file
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CPU Architectural Protocol as defined in PI spec Volume 2 DXE
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This code abstracts the DXE core from processor implementation details.
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Copyright (c) 2006 - 2008, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __ARCH_PROTOCOL_CPU_H__
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#define __ARCH_PROTOCOL_CPU_H__
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#include <Protocol/DebugSupport.h>
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#define EFI_CPU_ARCH_PROTOCOL_GUID \
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{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
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typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;
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typedef enum {
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EfiCpuFlushTypeWriteBackInvalidate,
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EfiCpuFlushTypeWriteBack,
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EfiCpuFlushTypeInvalidate,
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EfiCpuMaxFlushType
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} EFI_CPU_FLUSH_TYPE;
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typedef enum {
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EfiCpuInit,
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EfiCpuMaxInitType
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} EFI_CPU_INIT_TYPE;
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/**
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EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
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@param InterruptType Defines the type of interrupt or exception that
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occurred on the processor.This parameter is processor architecture specific.
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@param SystemContext A pointer to the processor context when
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the interrupt occurred on the processor.
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@return None
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**/
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typedef
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VOID
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(EFIAPI *EFI_CPU_INTERRUPT_HANDLER)(
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IN CONST EFI_EXCEPTION_TYPE InterruptType,
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IN CONST EFI_SYSTEM_CONTEXT SystemContext
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);
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/**
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This function flushes the range of addresses from Start to Start+Length
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from the processor's data cache. If Start is not aligned to a cache line
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boundary, then the bytes before Start to the preceding cache line boundary
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are also flushed. If Start+Length is not aligned to a cache line boundary,
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then the bytes past Start+Length to the end of the next cache line boundary
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are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
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supported. If the data cache is fully coherent with all DMA operations, then
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this function can just return EFI_SUCCESS. If the processor does not support
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flushing a range of the data cache, then the entire data cache can be flushed.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param Start The beginning physical address to flush from the processor's data
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cache.
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@param Length The number of bytes to flush from the processor's data cache. This
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function may flush more bytes than Length specifies depending upon
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the granularity of the flush operation that the processor supports.
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@param FlushType Specifies the type of flush operation to perform.
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@retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
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the processor's data cache.
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@retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
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by FlushType.
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@retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
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from the processor's data cache.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS Start,
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IN UINT64 Length,
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IN EFI_CPU_FLUSH_TYPE FlushType
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);
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/**
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This function enables interrupt processing by the processor.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@retval EFI_SUCCESS Interrupts are enabled on the processor.
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@retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_ENABLE_INTERRUPT)(
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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/**
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This function disables interrupt processing by the processor.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@retval EFI_SUCCESS Interrupts are disabled on the processor.
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@retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_DISABLE_INTERRUPT)(
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IN EFI_CPU_ARCH_PROTOCOL *This
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);
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/**
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This function retrieves the processor's current interrupt state a returns it in
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State. If interrupts are currently enabled, then TRUE is returned. If interrupts
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are currently disabled, then FALSE is returned.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param State A pointer to the processor's current interrupt state. Set to TRUE if
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interrupts are enabled and FALSE if interrupts are disabled.
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@retval EFI_SUCCESS The processor's current interrupt state was returned in State.
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@retval EFI_INVALID_PARAMETER State is NULL.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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OUT BOOLEAN *State
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);
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/**
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This function generates an INIT on the processor. If this function succeeds, then the
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processor will be reset, and control will not be returned to the caller. If InitType is
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not supported by this processor, or the processor cannot programmatically generate an
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INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
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occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param InitType The type of processor INIT to perform.
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@retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
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@retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
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by this processor.
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@retval EFI_DEVICE_ERROR The processor INIT failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_INIT)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_CPU_INIT_TYPE InitType
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);
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/**
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This function registers and enables the handler specified by InterruptHandler for a processor
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interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
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handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
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The installed handler is called once for each processor interrupt or exception.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
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are enabled and FALSE if interrupts are disabled.
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@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
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when a processor interrupt occurs. If this parameter is NULL, then the handler
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will be uninstalled.
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@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
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previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
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previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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);
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/**
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This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
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must be between 0 and NumberOfTimers-1.
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@param TimerValue Pointer to the returned timer value.
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@param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment
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of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is
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returned. This parameter is optional and may be NULL.
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@retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.
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@retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.
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@retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.
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@retval EFI_UNSUPPORTED The processor does not have any readable timers.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_GET_TIMER_VALUE)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN UINT32 TimerIndex,
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OUT UINT64 *TimerValue,
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OUT UINT64 *TimerPeriod OPTIONAL
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);
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/**
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This function modifies the attributes for the memory region specified by BaseAddress and
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Length from their current attributes to the attributes specified by Attributes.
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@param This The EFI_CPU_ARCH_PROTOCOL instance.
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@param BaseAddress The physical address that is the start address of a memory region.
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@param Length The size in bytes of the memory region.
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@param Attributes The bit mask of attributes to set for the memory region.
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@retval EFI_SUCCESS The attributes were set for the memory region.
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@retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
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BaseAddress and Length cannot be modified.
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@retval EFI_INVALID_PARAMETER Length is zero.
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@retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
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the memory resource range.
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@retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
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resource range specified by BaseAddress and Length.
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The bit mask of attributes is not support for the memory resource
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range specified by BaseAddress and Length.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)(
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IN EFI_CPU_ARCH_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINT64 Length,
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IN UINT64 Attributes
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);
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///
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/// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE
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/// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt
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/// vectors and exception vectors, reading internal processor timers, resetting the processor, and
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/// determining the processor frequency.
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///
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struct _EFI_CPU_ARCH_PROTOCOL {
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EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;
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EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;
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EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;
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EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;
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EFI_CPU_INIT Init;
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EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;
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EFI_CPU_GET_TIMER_VALUE GetTimerValue;
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EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;
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///
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/// The number of timers that are available in a processor. The value in this
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/// field is a constant that must not be modified after the CPU Architectural
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/// Protocol is installed. All consumers must treat this as a read-only field.
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///
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UINT32 NumberOfTimers;
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///
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/// The size, in bytes, of the alignment required for DMA buffer allocations.
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/// This is typically the size of the largest data cache line in the platform.
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/// The value in this field is a constant that must not be modified after the
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/// CPU Architectural Protocol is installed. All consumers must treat this as
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/// a read-only field.
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///
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UINT32 DmaBufferAlignment;
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};
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extern EFI_GUID gEfiCpuArchProtocolGuid;
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#endif
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