mirror of https://github.com/acidanthera/audk.git
86 lines
3.1 KiB
ArmAsm
86 lines
3.1 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroIoLib.h>
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#include <Library/PcdLib.h>
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.text
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.align 3
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.globl ASM_PFX(CEntryPoint)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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//Disable L2 cache
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mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
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bic r0, r0, #0x00000002 // disable L2 cache
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mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
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//Enable Strict alignment checking & Instruction cache
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
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bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
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orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
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orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
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mcr p15, 0, r0, c1, c0, 0
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// Enable NEON register in case folks want to use them for optimizations (CopyMem)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
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// Set CPU vectors to start of DRAM
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LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
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mcr p15, 0, r0, c12, c0, 0
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isb // Sync changes to control registers
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// Fill vector table with branchs to current pc (jmp $)
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ldr r1, ShouldNeverGetHere
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movs r2, #0
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FillVectors:
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str r1, [r0, r2]
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adds r2, r2, #4
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cmp r2, #32
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bne FillVectors
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/* before we call C code, lets setup the stack pointer in internal RAM */
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stack_pointer_setup:
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//
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// Set stack based on PCD values. Need to do it this way to make C code work
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// when it runs from FLASH.
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//
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
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add r4, r2, r3
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//Enter SVC mode and set up SVC stack pointer
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mov r0,#0x13|0x80|0x40
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msr CPSR_c,r0
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mov r13,r4
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// Call C entry point
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LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
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LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
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blx ASM_PFX(CEntryPoint) /* Assume C code is thumb */
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ShouldNeverGetHere:
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/* _CEntryPoint should never return */
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b ShouldNeverGetHere
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