mirror of https://github.com/acidanthera/audk.git
121 lines
5.4 KiB
Plaintext
121 lines
5.4 KiB
Plaintext
#/** @file
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#
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# Copyright (c) 2011-2018, ARM Limited. All rights reserved.
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# Copyright (c) 2015, Intel Corporation. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = ArmPlatformPkg
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PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
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PACKAGE_VERSION = 0.1
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################################################################################
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#
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# Include Section - list of Include Paths that are provided by this package.
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# Comments are used for Keywords and Module Types.
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#
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# Supported Module Types:
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# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
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#
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################################################################################
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[Includes.common]
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Include # Root include for the package
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[LibraryClasses]
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ArmPlatformLib|Include/Library/ArmPlatformLib.h
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LcdHwLib|Include/Library/LcdHwLib.h
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LcdPlatformLib|Include/Library/LcdPlatformLib.h
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NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
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PL011UartLib|Include/Library/PL011UartLib.h
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[Guids.common]
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gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
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[PcdsFeatureFlag.common]
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gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
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gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
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# Disable the GOP controller on ExitBootServices(). By default the value is FALSE,
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# we assume the OS will handle the FrameBuffer from the UEFI GOP information.
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gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
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[PcdsFixedAtBuild.common]
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gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
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gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
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# Stack for CPU Cores in Non Secure Mode
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
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# Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
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#
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# ARM Primecells
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#
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## SP805 Watchdog
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gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
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gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
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## PL011 UART
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gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
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gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
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gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
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gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F
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gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E
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## PL011 Serial Debug UART
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gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030
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gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031
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gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032
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## PL061 GPIO
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gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025
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## PL111 Lcd & HdLcd
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gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
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gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
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## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)
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gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043
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## If set, framebuffer memory will be reserved and mapped in the system RAM
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gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044
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## ARM Mali Display Processor DP500/DP550/DP650
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gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050
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gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051
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## PL180 MCI
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gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028
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gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029
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# Graphics Output Pixel format
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# 0 : PixelRedGreenBlueReserved8BitPerColor
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# 1 : PixelBlueGreenRedReserved8BitPerColor
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# 2 : PixelBitMask
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# Default is set to UEFI console font format PixelBlueGreenRedReserved8BitPerColor
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gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x00000001|UINT32|0x00000040
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## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT registers
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gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x00000045
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[PcdsFixedAtBuild.common,PcdsDynamic.common]
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
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gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
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gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033
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