mirror of https://github.com/acidanthera/audk.git
597 lines
20 KiB
C
597 lines
20 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "PciEmulation.h"
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#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44
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typedef struct {
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ACPI_HID_DEVICE_PATH AcpiDevicePath;
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PCI_DEVICE_PATH PciDevicePath;
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EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
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} EFI_PCI_IO_DEVICE_PATH;
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typedef struct {
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UINT32 Signature;
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EFI_PCI_IO_DEVICE_PATH DevicePath;
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EFI_PCI_IO_PROTOCOL PciIoProtocol;
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PCI_TYPE00 *ConfigSpace;
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PCI_ROOT_BRIDGE RootBridge;
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UINTN Segment;
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} EFI_PCI_IO_PRIVATE_DATA;
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#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o')
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#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR (a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE)
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EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =
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{
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{
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{ ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } },
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EISA_PNP_ID(0x0A03), // HID
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0 // UID
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},
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{
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{ HARDWARE_DEVICE_PATH, HW_PCI_DP, { sizeof (PCI_DEVICE_PATH), 0 } },
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0,
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0
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},
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{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} }
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};
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STATIC
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VOID
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ConfigureUSBHost (
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VOID
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)
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{
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}
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EFI_STATUS
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PciIoPollMem (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINT64 Mask,
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IN UINT64 Value,
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IN UINT64 Delay,
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OUT UINT64 *Result
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PciIoPollIo (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINT64 Mask,
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IN UINT64 Value,
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IN UINT64 Delay,
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OUT UINT64 *Result
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PciIoMemRead (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
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return PciRootBridgeIoMemRead (&Private->RootBridge.Io,
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(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
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Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace
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Count,
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Buffer
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);
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}
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EFI_STATUS
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PciIoMemWrite (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
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return PciRootBridgeIoMemWrite (&Private->RootBridge.Io,
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(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
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Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace
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Count,
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Buffer
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);
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}
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EFI_STATUS
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PciIoIoRead (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PciIoIoWrite (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 BarIndex,
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IN UINT64 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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/**
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Enable a PCI driver to read PCI controller registers in PCI configuration space.
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@param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
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@param[in] Width Signifies the width of the memory operations.
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@param[in] Offset The offset within the PCI configuration space for
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the PCI controller.
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@param[in] Count The number of PCI configuration operations to
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perform. Bytes moved is Width size * Count,
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starting at Offset.
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@param[in out] Buffer The destination buffer to store the results.
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@retval EFI_SUCCESS The data was read from the PCI controller.
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@retval EFI_INVALID_PARAMETER "Width" is invalid.
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@retval EFI_INVALID_PARAMETER "Buffer" is NULL.
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**/
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EFI_STATUS
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PciIoPciRead (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT32 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
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EFI_STATUS Status;
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if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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Status = PciRootBridgeIoMemRW (
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(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
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Count,
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TRUE,
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(PTR)(UINTN)Buffer,
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TRUE,
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(PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix me ConfigSpace
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);
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return Status;
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}
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/**
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Enable a PCI driver to write PCI controller registers in PCI configuration space.
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@param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
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@param[in] Width Signifies the width of the memory operations.
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@param[in] Offset The offset within the PCI configuration space for
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the PCI controller.
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@param[in] Count The number of PCI configuration operations to
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perform. Bytes moved is Width size * Count,
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starting at Offset.
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@param[in out] Buffer The source buffer to write data from.
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@retval EFI_SUCCESS The data was read from the PCI controller.
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@retval EFI_INVALID_PARAMETER "Width" is invalid.
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@retval EFI_INVALID_PARAMETER "Buffer" is NULL.
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**/
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EFI_STATUS
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PciIoPciWrite (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT32 Offset,
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IN UINTN Count,
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IN OUT VOID *Buffer
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)
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{
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EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
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if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
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Count,
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TRUE,
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(PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset), //Fix me ConfigSpace
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TRUE,
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(PTR)(UINTN)Buffer
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);
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}
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EFI_STATUS
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PciIoCopyMem (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
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IN UINT8 DestBarIndex,
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IN UINT64 DestOffset,
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IN UINT8 SrcBarIndex,
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IN UINT64 SrcOffset,
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IN UINTN Count
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PciIoMap (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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)
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{
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DMA_MAP_OPERATION DmaOperation;
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if (Operation == EfiPciIoOperationBusMasterRead) {
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DmaOperation = MapOperationBusMasterRead;
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} else if (Operation == EfiPciIoOperationBusMasterWrite) {
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DmaOperation = MapOperationBusMasterWrite;
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} else if (Operation == EfiPciIoOperationBusMasterCommonBuffer) {
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DmaOperation = MapOperationBusMasterCommonBuffer;
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, Mapping);
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}
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EFI_STATUS
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PciIoUnmap (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN VOID *Mapping
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)
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{
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return DmaUnmap (Mapping);
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}
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/**
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Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
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mapping.
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@param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
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@param[in] Type This parameter is not used and must be ignored.
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@param[in] MemoryType The type of memory to allocate, EfiBootServicesData or
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EfiRuntimeServicesData.
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@param[in] Pages The number of pages to allocate.
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@param[out] HostAddress A pointer to store the base system memory address of
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the allocated range.
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@param[in] Attributes The requested bit mask of attributes for the allocated
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range. Only the attributes,
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EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and
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EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used with this
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function. If any other bits are set, then EFI_UNSUPPORTED
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is returned. This function ignores this bit mask.
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@retval EFI_SUCCESS The requested memory pages were allocated.
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@retval EFI_INVALID_PARAMETER HostAddress is NULL.
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@retval EFI_INVALID_PARAMETER MemoryType is invalid.
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@retval EFI_UNSUPPORTED Attributes is unsupported.
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@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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**/
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EFI_STATUS
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PciIoAllocateBuffer (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_ALLOCATE_TYPE Type,
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IN EFI_MEMORY_TYPE MemoryType,
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IN UINTN Pages,
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OUT VOID **HostAddress,
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IN UINT64 Attributes
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)
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{
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if (Attributes &
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(~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE |
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EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) {
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return EFI_UNSUPPORTED;
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}
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return DmaAllocateBuffer (MemoryType, Pages, HostAddress);
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}
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EFI_STATUS
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PciIoFreeBuffer (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN UINTN Pages,
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IN VOID *HostAddress
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)
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{
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return DmaFreeBuffer (Pages, HostAddress);
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}
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EFI_STATUS
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PciIoFlush (
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IN EFI_PCI_IO_PROTOCOL *This
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)
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{
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return EFI_SUCCESS;
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}
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/**
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Retrieves this PCI controller's current PCI bus number, device number, and function number.
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@param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
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@param[out] SegmentNumber The PCI controller's current PCI segment number.
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@param[out] BusNumber The PCI controller's current PCI bus number.
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@param[out] DeviceNumber The PCI controller's current PCI device number.
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@param[out] FunctionNumber The PCI controller’s current PCI function number.
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@retval EFI_SUCCESS The PCI controller location was returned.
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@retval EFI_INVALID_PARAMETER At least one out of the four output parameters is
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a NULL pointer.
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**/
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EFI_STATUS
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PciIoGetLocation (
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IN EFI_PCI_IO_PROTOCOL *This,
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OUT UINTN *SegmentNumber,
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OUT UINTN *BusNumber,
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OUT UINTN *DeviceNumber,
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OUT UINTN *FunctionNumber
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)
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{
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EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This);
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if ((SegmentNumber == NULL) || (BusNumber == NULL) ||
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(DeviceNumber == NULL) || (FunctionNumber == NULL) ) {
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return EFI_INVALID_PARAMETER;
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}
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*SegmentNumber = Private->Segment;
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*BusNumber = 0xff;
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*DeviceNumber = 0;
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*FunctionNumber = 0;
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return EFI_SUCCESS;
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}
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/**
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Performs an operation on the attributes that this PCI controller supports.
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The operations include getting the set of supported attributes, retrieving
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the current attributes, setting the current attributes, enabling attributes,
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and disabling attributes.
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@param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance.
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@param[in] Operation The operation to perform on the attributes for this
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PCI controller.
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@param[in] Attributes The mask of attributes that are used for Set,
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Enable and Disable operations.
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@param[out] Result A pointer to the result mask of attributes that are
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returned for the Get and Supported operations. This
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is an optional parameter that may be NULL for the
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Set, Enable, and Disable operations.
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@retval EFI_SUCCESS The operation on the PCI controller's
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attributes was completed. If the operation
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was Get or Supported, then the attribute mask
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is returned in Result.
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@retval EFI_INVALID_PARAMETER Operation is greater than or equal to
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EfiPciIoAttributeOperationMaximum.
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@retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL.
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@retval EFI_INVALID_PARAMETER Operation is Supported and Result is NULL.
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**/
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EFI_STATUS
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PciIoAttributes (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
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IN UINT64 Attributes,
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OUT UINT64 *Result OPTIONAL
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)
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{
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switch (Operation) {
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case EfiPciIoAttributeOperationGet:
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case EfiPciIoAttributeOperationSupported:
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if (Result == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// We are not a real PCI device so just say things we kind of do
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//
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*Result = EFI_PCI_DEVICE_ENABLE;
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break;
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case EfiPciIoAttributeOperationSet:
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case EfiPciIoAttributeOperationEnable:
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case EfiPciIoAttributeOperationDisable:
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if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) {
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return EFI_UNSUPPORTED;
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}
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// Since we are not a real PCI device no enable/set or disable operations exist.
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return EFI_SUCCESS;
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default:
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return EFI_INVALID_PARAMETER;
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};
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return EFI_SUCCESS;
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}
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EFI_STATUS
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PciIoGetBarAttributes (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN UINT8 BarIndex,
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OUT UINT64 *Supports, OPTIONAL
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OUT VOID **Resources OPTIONAL
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PciIoSetBarAttributes (
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IN EFI_PCI_IO_PROTOCOL *This,
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IN UINT64 Attributes,
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IN UINT8 BarIndex,
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IN OUT UINT64 *Offset,
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IN OUT UINT64 *Length
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)
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{
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ASSERT (FALSE);
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return EFI_UNSUPPORTED;
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}
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EFI_PCI_IO_PROTOCOL PciIoTemplate =
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{
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PciIoPollMem,
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PciIoPollIo,
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{ PciIoMemRead, PciIoMemWrite },
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{ PciIoIoRead, PciIoIoWrite },
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{ PciIoPciRead, PciIoPciWrite },
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PciIoCopyMem,
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PciIoMap,
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PciIoUnmap,
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PciIoAllocateBuffer,
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PciIoFreeBuffer,
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PciIoFlush,
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PciIoGetLocation,
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PciIoAttributes,
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PciIoGetBarAttributes,
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PciIoSetBarAttributes,
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0,
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0
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};
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EFI_STATUS
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PciInstallDevice (
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IN UINTN DeviceId,
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IN PHYSICAL_ADDRESS MemoryStart,
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IN UINT64 MemorySize,
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IN UINTN ClassCode1,
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IN UINTN ClassCode2,
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IN UINTN ClassCode3
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)
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{
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EFI_STATUS Status;
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EFI_HANDLE Handle;
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EFI_PCI_IO_PRIVATE_DATA *Private;
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// Configure USB host
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ConfigureUSBHost ();
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// Create a private structure
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Private = AllocatePool (sizeof (EFI_PCI_IO_PRIVATE_DATA));
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if (Private == NULL) {
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Status = EFI_OUT_OF_RESOURCES;
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return Status;
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}
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Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature
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Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too
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Private->RootBridge.MemoryStart = MemoryStart; // Get the USB capability register base
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Private->Segment = 0; // Default to segment zero
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|
||
// Calculate the total size of the USB controller (OHCI + EHCI).
|
||
Private->RootBridge.MemorySize = MemorySize; //CapabilityLength + (HOST_CONTROLLER_OPERATION_REG_SIZE + ((4 * PhysicalPorts) - 1));
|
||
|
||
// Create fake PCI config space: OHCI + EHCI
|
||
Private->ConfigSpace = AllocateZeroPool (sizeof (PCI_TYPE00));
|
||
if (Private->ConfigSpace == NULL) {
|
||
Status = EFI_OUT_OF_RESOURCES;
|
||
FreePool (Private);
|
||
return Status;
|
||
}
|
||
|
||
//
|
||
// Configure PCI config space: OHCI + EHCI
|
||
//
|
||
Private->ConfigSpace->Hdr.VendorId = 0xFFFF; // Invalid vendor Id as it is not an actual device.
|
||
Private->ConfigSpace->Hdr.DeviceId = 0x0000; // Not relevant as the vendor id is not valid.
|
||
Private->ConfigSpace->Hdr.ClassCode[0] = ClassCode1;
|
||
Private->ConfigSpace->Hdr.ClassCode[1] = ClassCode2;
|
||
Private->ConfigSpace->Hdr.ClassCode[2] = ClassCode3;
|
||
Private->ConfigSpace->Device.Bar[0] = MemoryStart;
|
||
|
||
Handle = NULL;
|
||
|
||
// Unique device path.
|
||
CopyMem (&Private->DevicePath, &PciIoDevicePathTemplate, sizeof (PciIoDevicePathTemplate));
|
||
Private->DevicePath.AcpiDevicePath.UID = 1; // Use '1' to differentiate from PLDA root complex
|
||
Private->DevicePath.PciDevicePath.Device = DeviceId;
|
||
|
||
// Copy protocol structure
|
||
CopyMem (&Private->PciIoProtocol, &PciIoTemplate, sizeof (PciIoTemplate));
|
||
|
||
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
|
||
&gEfiPciIoProtocolGuid, &Private->PciIoProtocol,
|
||
&gEfiDevicePathProtocolGuid, &Private->DevicePath,
|
||
NULL);
|
||
if (EFI_ERROR (Status)) {
|
||
DEBUG ((EFI_D_ERROR, "PciEmulationEntryPoint InstallMultipleProtocolInterfaces () failed.\n"));
|
||
}
|
||
|
||
return Status;
|
||
}
|
||
|
||
EFI_STATUS
|
||
PciEmulationEntryPoint (
|
||
VOID
|
||
)
|
||
{
|
||
EFI_STATUS Status;
|
||
|
||
Status = PciInstallDevice (0, FixedPcdGet32 (PcdSynopsysUsbOhciBaseAddress), SIZE_64KB, PCI_IF_OHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL);
|
||
if (EFI_ERROR (Status)) {
|
||
DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install OHCI device.\n"));
|
||
}
|
||
|
||
Status = PciInstallDevice (1, FixedPcdGet32 (PcdSynopsysUsbEhciBaseAddress), SIZE_64KB, PCI_IF_EHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL);
|
||
if (EFI_ERROR (Status)) {
|
||
DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install EHCI device.\n"));
|
||
}
|
||
|
||
return Status;
|
||
}
|