mirror of
https://github.com/acidanthera/audk.git
synced 2025-04-08 17:05:09 +02:00
The DmaBufferAlignment currently defaults to 4, which is dangerously small and may result in lost data on platforms that perform non-coherent DMA. So instead, take the CWG value from the cache info registers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>