mirror of https://github.com/acidanthera/audk.git
251 lines
8.0 KiB
C
251 lines
8.0 KiB
C
/** @file
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Copyright (c) 2008-2009, Apple Inc. All rights reserved.
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <CpuDxe.h>
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#include <Library/CacheMaintenanceLib.h>
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VOID
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ExceptionHandlersStart (
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VOID
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);
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VOID
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ExceptionHandlersEnd (
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VOID
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);
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VOID
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CommonExceptionEntry (
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VOID
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);
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VOID
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AsmCommonExceptionEntry (
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VOID
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);
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1];
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/**
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This function registers and enables the handler specified by InterruptHandler for a processor
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interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
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handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
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The installed handler is called once for each processor interrupt or exception.
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@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
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are enabled and FALSE if interrupts are disabled.
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@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
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when a processor interrupt occurs. If this parameter is NULL, then the handler
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will be uninstalled.
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@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
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previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
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previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
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**/
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EFI_STATUS
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RegisterInterruptHandler (
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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)
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{
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if (InterruptType > MAX_ARM_EXCEPTION) {
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return EFI_UNSUPPORTED;
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}
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if ((InterruptHandler == NULL) && (gExceptionHandlers[InterruptType] == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {
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return EFI_ALREADY_STARTED;
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}
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gExceptionHandlers[InterruptType] = InterruptHandler;
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return EFI_SUCCESS;
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}
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VOID
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EFIAPI
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DefaultSWIExceptionHandler(
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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return;
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}
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VOID
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EFIAPI
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DefaultExceptionHandler(
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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DEBUG ((EFI_D_ERROR, "Exception %d from %x\n", ExceptionType, SystemContext.SystemContextArm->PC));
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ASSERT (FALSE);
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return;
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}
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EFI_STATUS
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InitializeExceptions (
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IN EFI_CPU_ARCH_PROTOCOL *Cpu
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINTN Offset;
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UINTN Length;
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UINTN Index;
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BOOLEAN Enabled;
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//
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// Disable interrupts
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//
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Cpu->GetInterruptState (Cpu, &Enabled);
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Cpu->DisableInterrupt (Cpu);
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//
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// Initialize the C entry points for interrupts
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//
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for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {
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if (Index == EXCEPT_ARM_SOFTWARE_INTERRUPT) {
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Status = Cpu->RegisterInterruptHandler (Cpu, Index, DefaultSWIExceptionHandler);
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} else {
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Status = Cpu->RegisterInterruptHandler (Cpu, Index, DefaultExceptionHandler);
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}
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ASSERT_EFI_ERROR (Status);
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}
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//
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// Copy an implementation of the ARM exception vectors to 0x0.
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//
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Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
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CopyMem ((VOID *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress), (VOID *)ExceptionHandlersStart, Length);
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//
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// Patch in the common Assembly exception handler
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//
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Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;
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*(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;
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//
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// Flush Caches since we updated executable stuff
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//
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InvalidateInstructionCache ();
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if (Enabled) {
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//
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// Restore interrupt state
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//
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Status = Cpu->EnableInterrupt (Cpu);
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}
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return Status;
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}
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/**
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This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
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@param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
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must be between 0 and NumberOfTimers-1.
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@param TimerValue Pointer to the returned timer value.
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@param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment
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of TimerValue.
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@retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.
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@retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.
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@retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.
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@retval EFI_UNSUPPORTED The processor does not have any readable timers.
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**/
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EFI_STATUS
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EFIAPI
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GetTimerValue (
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IN UINT32 TimerIndex,
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OUT UINT64 *TimerValue,
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OUT UINT64 *TimerPeriod OPTIONAL
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)
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{
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return EFI_UNSUPPORTED;
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}
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/**
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This function flushes the range of addresses from Start to Start+Length
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from the processor's data cache. If Start is not aligned to a cache line
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boundary, then the bytes before Start to the preceding cache line boundary
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are also flushed. If Start+Length is not aligned to a cache line boundary,
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then the bytes past Start+Length to the end of the next cache line boundary
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are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
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supported. If the data cache is fully coherent with all DMA operations, then
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this function can just return EFI_SUCCESS. If the processor does not support
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flushing a range of the data cache, then the entire data cache can be flushed.
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@param Start The beginning physical address to flush from the processor's data
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cache.
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@param Length The number of bytes to flush from the processor's data cache. This
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function may flush more bytes than Length specifies depending upon
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the granularity of the flush operation that the processor supports.
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@param FlushType Specifies the type of flush operation to perform.
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@retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
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the processor's data cache.
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@retval EFI_UNSUPPORTED The processor does not support the cache flush type specified
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by FlushType.
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@retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
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from the processor's data cache.
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**/
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EFI_STATUS
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EFIAPI
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FlushCpuDataCache (
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IN EFI_PHYSICAL_ADDRESS Start,
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IN UINT64 Length,
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IN EFI_CPU_FLUSH_TYPE FlushType
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)
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{
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if (FlushType == EfiCpuFlushTypeWriteBackInvalidate) {
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WriteBackInvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);
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return EFI_SUCCESS;
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} else if (FlushType == EfiCpuFlushTypeInvalidate) {
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InvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);
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return EFI_SUCCESS;
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} else if (FlushType == EfiCpuFlushTypeWriteBack) {
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WriteBackDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);
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return EFI_SUCCESS;
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} else {
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return EFI_UNSUPPORTED;
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}
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}
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