mirror of https://github.com/acidanthera/audk.git
77 lines
1.7 KiB
C
77 lines
1.7 KiB
C
/** @file
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PciHostBridge driver module, part of QNC module.
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Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation.
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "CommonHeader.h"
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#include "QNCInit.h"
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UINT32 mS3ParameterRootPortDownstream = 0;
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EFI_QNC_S3_DISPATCH_ITEM mS3DispatchItem = {
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QncS3ItemTypeInitPcieRootPortDownstream,
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&mS3ParameterRootPortDownstream
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};
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EFI_STATUS
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QncInitRootPorts (
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)
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/*++
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Routine Description:
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Perform Initialization of the Downstream Root Ports
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Arguments:
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Returns:
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EFI_SUCCESS The function completed successfully
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--*/
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{
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EFI_STATUS Status;
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EFI_QNC_S3_SUPPORT_PROTOCOL *QncS3Support;
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VOID *Context;
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VOID *S3DispatchEntryPoint;
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Status = PciExpressInit ();
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ASSERT_EFI_ERROR (Status);
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//
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// Get the QNC S3 Support Protocol
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//
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Status = gBS->LocateProtocol (
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&gEfiQncS3SupportProtocolGuid,
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NULL,
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(VOID **) &QncS3Support
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);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Get the QNC S3 Support Protocol
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//
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Status = QncS3Support->SetDispatchItem (
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QncS3Support,
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&mS3DispatchItem,
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&S3DispatchEntryPoint,
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&Context
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Save the script dispatch item in the Boot Script
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//
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Status = S3BootScriptSaveDispatch2 (S3DispatchEntryPoint, Context);
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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