mirror of https://github.com/acidanthera/audk.git
46 lines
1.9 KiB
C
46 lines
1.9 KiB
C
/** @file
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A Base Timer Library implementation which uses the Time Stamp Counter in the processor.
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For Pentium 4 processors, Intel Xeon processors (family [0FH], models [03H and higher]);
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for Intel Core Solo and Intel Core Duo processors (family [06H], model [0EH]);
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for the Intel Xeon processor 5100 series and Intel Core 2 Duo processors (family [06H], model [0FH]);
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for Intel Core 2 and Intel Xeon processors (family [06H], display_model [17H]);
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for Intel Atom processors (family [06H], display_model [1CH]):
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the time-stamp counter increments at a constant rate.
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That rate may be set by the maximum core-clock to bus-clock ratio of the processor or may be set by
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the maximum resolved frequency at which the processor is booted. The maximum resolved frequency may
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differ from the maximum qualified frequency of the processor.
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The specific processor configuration determines the behavior. Constant TSC behavior ensures that the
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duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if
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the processor core changes frequency. This is the architectural behavior moving forward.
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A Processor's support for invariant TSC is indicated by CPUID.0x80000007.EDX[8].
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Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "TscTimerLibInternal.h"
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/** Get TSC frequency.
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@return The number of TSC counts per second.
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**/
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UINT64
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InternalGetTscFrequency (
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VOID
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)
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{
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return InternalCalculateTscFrequency ();
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}
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