mirror of https://github.com/acidanthera/audk.git
699 lines
26 KiB
Plaintext
699 lines
26 KiB
Plaintext
/** @file
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Contains root level name space objects for the platform
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Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {
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//
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// System Sleep States
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//
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// We build S3 and S4 with GetSuspendStates() in
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// "OvmfPkg/AcpiPlatformDxe/Qemu.c".
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//
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Name (\_S0, Package () {5, 0, 0, 0}) // Working
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Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off
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//
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// System Bus
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//
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Scope (\_SB) {
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//
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// PCI Root Bridge
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//
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Device (PCI0) {
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Name (_HID, EISAID ("PNP0A03"))
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Name (_ADR, 0x00000000)
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Name (_BBN, 0x00)
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Name (_UID, 0x00)
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//
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// BUS, I/O, and MMIO resources
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//
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Name (CRES, ResourceTemplate () {
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WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
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ResourceProducer, // bit 0 of general flags is 1
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode, // PosDecode
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0x0000, // Granularity
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0x0000, // Min
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0x00FF, // Max
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0x0000, // Translation
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0x0100 // Range Length = Max-Min+1
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)
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IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
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WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0000, // Min
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0x0CF7, // Max
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0x0000, // Translation
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0x0CF8 // Range Length
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)
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WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0D00, // Min
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0xFFFF, // Max
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0x0000, // Translation
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0xF300 // Range Length
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)
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DWORDMEMORY ( // Descriptor for legacy VGA video RAM
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x000A0000, // Min
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0x000BFFFF, // Max
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0x00000000, // Translation
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for 32-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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NonCacheable,
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ReadWrite,
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0x00000000, // Granularity
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0xF8000000, // Min
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0xFFFBFFFF, // Max
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0x00000000, // Translation
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0x07FC0000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW32 // DescriptorName
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)
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})
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Name (CR64, ResourceTemplate () {
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QWordMemory ( // Descriptor for 64-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x8000000000, // Min
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0xFFFFFFFFFF, // Max
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0x00000000, // Translation
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0x8000000000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW64 // DescriptorName
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)
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})
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Method (_CRS, 0) {
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//
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// see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
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//
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External (FWDT, OpRegionObj)
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Field(FWDT, QWordAcc, NoLock, Preserve) {
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P0S, 64, // PciWindow32.Base
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P0E, 64, // PciWindow32.End
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P0L, 64, // PciWindow32.Length
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P1S, 64, // PciWindow64.Base
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P1E, 64, // PciWindow64.End
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P1L, 64 // PciWindow64.Length
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}
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Field(FWDT, DWordAcc, NoLock, Preserve) {
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P0SL, 32, // PciWindow32.Base, low 32 bits
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P0SH, 32, // PciWindow32.Base, high 32 bits
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P0EL, 32, // PciWindow32.End, low 32 bits
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P0EH, 32, // PciWindow32.End, high 32 bits
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P0LL, 32, // PciWindow32.Length, low 32 bits
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P0LH, 32, // PciWindow32.Length, high 32 bits
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P1SL, 32, // PciWindow64.Base, low 32 bits
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P1SH, 32, // PciWindow64.Base, high 32 bits
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P1EL, 32, // PciWindow64.End, low 32 bits
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P1EH, 32, // PciWindow64.End, high 32 bits
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P1LL, 32, // PciWindow64.Length, low 32 bits
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P1LH, 32 // PciWindow64.Length, high 32 bits
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}
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//
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// fixup 32-bit PCI IO window
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//
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CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
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Store (P0SL, PS32)
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Store (P0EL, PE32)
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Store (P0LL, PL32)
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If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
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Return (CRES)
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} Else {
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//
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// fixup 64-bit PCI IO window
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//
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CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
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Store (P1S, PS64)
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Store (P1E, PE64)
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Store (P1L, PL64)
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//
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// add window and return result
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//
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ConcatenateResTemplate (CRES, CR64, Local0)
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Return (Local0)
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}
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}
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//
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// PCI Interrupt Routing Table - PIC Mode Only
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//
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Method (_PRT, 0, NotSerialized) {
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Return (
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Package () {
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//
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// Bus 0; Devices 0 to 15
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//
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Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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//
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// Bus 0, Device 1, Pin 0 (INTA) is special; it corresponds to the
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// internally generated SCI (System Control Interrupt), which is
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// always routed to GSI 9. By setting the third (= Source) field to
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// zero, we could use the fourth (= Source Index) field to hardwire
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// the pin to GSI 9 directly.
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//
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// That way however, in accordance with the ACPI spec's description
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// of SCI, the interrupt would be treated as "active low,
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// shareable, level", and that doesn't match qemu.
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//
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// In QemuInstallAcpiMadtTable() [OvmfPkg/AcpiPlatformDxe/Qemu.c]
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// we install an Interrupt Override Structure for the identity
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// mapped IRQ#9 / GSI 9 (the corresponding bit being set in
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// Pcd8259LegacyModeEdgeLevel), which describes the correct
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// polarity (active high). As a consequence, some OS'en (eg. Linux)
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// override the default (active low) polarity originating from the
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// _PRT; others (eg. FreeBSD) don't. Therefore we need a separate
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// link device just to specify a polarity that matches the MADT.
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//
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Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKS, 0x00},
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Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}
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}
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)
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}
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//
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// PCI to ISA Bridge (Bus 0, Device 1, Function 0)
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// "Low Pin Count"
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//
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Device (LPC) {
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Name (_ADR, 0x00010000)
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//
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// The SCI cannot be rerouted or disabled with PIRQRC[A:D]; we only
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// need this link device in order to specify the polarity.
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//
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Device (LNKS) {
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Name (_HID, EISAID("PNP0C0F"))
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Name (_UID, 0)
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Name (_STA, 0xB) // 0x1: device present
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// 0x2: enabled and decoding resources
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// 0x8: functioning properly
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Method (_SRS, 1, NotSerialized) { /* no-op */ }
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Method (_DIS, 0, NotSerialized) { /* no-op */ }
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Name (_PRS, ResourceTemplate () {
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Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 9 }
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//
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// list of IRQs occupied thus far: 9
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//
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})
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Method (_CRS, 0, NotSerialized) { Return (_PRS) }
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}
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//
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// PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]
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//
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OperationRegion (PRR0, PCI_Config, 0x60, 0x04)
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Field (PRR0, ANYACC, NOLOCK, PRESERVE) {
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PIRA, 8,
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PIRB, 8,
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PIRC, 8,
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PIRD, 8
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}
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//
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// _STA method for LNKA, LNKB, LNKC, LNKD
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// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
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//
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Method (PSTA, 1, NotSerialized) {
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If (And (Arg0, 0x80)) { // disable-bit set?
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Return (0x9) // "device present" | "functioning properly"
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} Else {
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Return (0xB) // same | "enabled and decoding resources"
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}
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}
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//
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// _CRS method for LNKA, LNKB, LNKC, LNKD
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// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
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//
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Method (PCRS, 1, NotSerialized) {
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//
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// create temporary buffer with an Extended Interrupt Descriptor
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// whose single vector defaults to zero
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//
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Name (BUF0, ResourceTemplate () {
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Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}
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}
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)
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//
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// define reference to first interrupt vector in buffer
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//
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CreateDWordField (BUF0, 0x05, IRQW)
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//
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// If the disable-bit is clear, overwrite the default zero vector
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// with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read
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// as 0.
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//
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If (LNot (And (Arg0, 0x80))) {
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Store (Arg0, IRQW)
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}
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Return (BUF0)
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}
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//
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// _PRS resource for LNKA, LNKB, LNKC, LNKD
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//
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Name (PPRS, ResourceTemplate () {
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Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}
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//
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// list of IRQs occupied thus far: 9, 5, 10, 11
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//
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})
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//
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// PCI IRQ Link A
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//
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Device (LNKA) {
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Name (_HID, EISAID("PNP0C0F"))
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Name (_UID, 1)
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Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }
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Method (_DIS, 0, NotSerialized) {
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Or (PIRA, 0x80, PIRA) // set disable-bit
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}
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Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }
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Method (_PRS, 0, NotSerialized) { Return (PPRS) }
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Method (_SRS, 1, NotSerialized) {
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CreateDWordField (Arg0, 0x05, IRQW)
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Store (IRQW, PIRA)
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}
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}
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//
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// PCI IRQ Link B
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//
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Device (LNKB) {
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Name (_HID, EISAID("PNP0C0F"))
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Name (_UID, 2)
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Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }
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Method (_DIS, 0, NotSerialized) {
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Or (PIRB, 0x80, PIRB) // set disable-bit
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}
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Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }
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Method (_PRS, 0, NotSerialized) { Return (PPRS) }
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Method (_SRS, 1, NotSerialized) {
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CreateDWordField (Arg0, 0x05, IRQW)
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Store (IRQW, PIRB)
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}
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}
|
|
|
|
//
|
|
// PCI IRQ Link C
|
|
//
|
|
Device (LNKC) {
|
|
Name (_HID, EISAID("PNP0C0F"))
|
|
Name (_UID, 3)
|
|
|
|
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }
|
|
Method (_DIS, 0, NotSerialized) {
|
|
Or (PIRC, 0x80, PIRC) // set disable-bit
|
|
}
|
|
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }
|
|
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
|
Method (_SRS, 1, NotSerialized) {
|
|
CreateDWordField (Arg0, 0x05, IRQW)
|
|
Store (IRQW, PIRC)
|
|
}
|
|
}
|
|
|
|
//
|
|
// PCI IRQ Link D
|
|
//
|
|
Device (LNKD) {
|
|
Name (_HID, EISAID("PNP0C0F"))
|
|
Name (_UID, 4)
|
|
|
|
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }
|
|
Method (_DIS, 0, NotSerialized) {
|
|
Or (PIRD, 0x80, PIRD) // set disable-bit
|
|
}
|
|
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }
|
|
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
|
Method (_SRS, 1, NotSerialized) {
|
|
CreateDWordField (Arg0, 0x05, IRQW)
|
|
Store (IRQW, PIRD)
|
|
}
|
|
}
|
|
|
|
//
|
|
// Programmable Interrupt Controller (PIC)
|
|
//
|
|
Device(PIC) {
|
|
Name (_HID, EISAID ("PNP0000"))
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x020, 0x020, 0x00, 0x02)
|
|
IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)
|
|
IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)
|
|
IRQNoFlags () {2}
|
|
//
|
|
// list of IRQs occupied thus far: 9, 5, 10, 11, 2
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// ISA DMA
|
|
//
|
|
Device (DMAC) {
|
|
Name (_HID, EISAID ("PNP0200"))
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x00, 0x00, 0, 0x10)
|
|
IO (Decode16, 0x81, 0x81, 0, 0x03)
|
|
IO (Decode16, 0x87, 0x87, 0, 0x01)
|
|
IO (Decode16, 0x89, 0x89, 0, 0x03)
|
|
IO (Decode16, 0x8f, 0x8f, 0, 0x01)
|
|
IO (Decode16, 0xc0, 0xc0, 0, 0x20)
|
|
DMA (Compatibility, NotBusMaster, Transfer8) {4}
|
|
})
|
|
}
|
|
|
|
//
|
|
// 8254 Timer
|
|
//
|
|
Device(TMR) {
|
|
Name(_HID,EISAID("PNP0100"))
|
|
Name(_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x40, 0x40, 0x00, 0x04)
|
|
IRQNoFlags () {0}
|
|
//
|
|
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// Real Time Clock
|
|
//
|
|
Device (RTC) {
|
|
Name (_HID, EISAID ("PNP0B00"))
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x70, 0x70, 0x00, 0x02)
|
|
IRQNoFlags () {8}
|
|
//
|
|
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// PCAT Speaker
|
|
//
|
|
Device(SPKR) {
|
|
Name (_HID, EISAID("PNP0800"))
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x61, 0x61, 0x01, 0x01)
|
|
})
|
|
}
|
|
|
|
//
|
|
// Floating Point Coprocessor
|
|
//
|
|
Device(FPU) {
|
|
Name (_HID, EISAID("PNP0C04"))
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)
|
|
IRQNoFlags () {13}
|
|
//
|
|
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// Generic motherboard devices and pieces that don't fit anywhere else
|
|
//
|
|
Device(XTRA) {
|
|
Name (_HID, EISAID ("PNP0C02"))
|
|
Name (_UID, 0x01)
|
|
Name (_CRS, ResourceTemplate () {
|
|
IO (Decode16, 0x010, 0x010, 0x00, 0x10)
|
|
IO (Decode16, 0x022, 0x022, 0x00, 0x1E)
|
|
IO (Decode16, 0x044, 0x044, 0x00, 0x1C)
|
|
IO (Decode16, 0x062, 0x062, 0x00, 0x02)
|
|
IO (Decode16, 0x065, 0x065, 0x00, 0x0B)
|
|
IO (Decode16, 0x072, 0x072, 0x00, 0x0E)
|
|
IO (Decode16, 0x080, 0x080, 0x00, 0x01)
|
|
IO (Decode16, 0x084, 0x084, 0x00, 0x03)
|
|
IO (Decode16, 0x088, 0x088, 0x00, 0x01)
|
|
IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)
|
|
IO (Decode16, 0x090, 0x090, 0x00, 0x10)
|
|
IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)
|
|
IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)
|
|
IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)
|
|
IO (Decode16, 0x160, 0x160, 0x00, 0x10)
|
|
IO (Decode16, 0x278, 0x278, 0x00, 0x08)
|
|
IO (Decode16, 0x370, 0x370, 0x00, 0x02)
|
|
IO (Decode16, 0x378, 0x378, 0x00, 0x08)
|
|
IO (Decode16, 0x402, 0x402, 0x00, 0x01) // QEMU debug console, should use FixedPcdGet16 (PcdDebugIoPort)
|
|
IO (Decode16, 0x440, 0x440, 0x00, 0x10)
|
|
IO (Decode16, 0x678, 0x678, 0x00, 0x08)
|
|
IO (Decode16, 0x778, 0x778, 0x00, 0x08)
|
|
IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK
|
|
IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1
|
|
Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC
|
|
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC
|
|
})
|
|
}
|
|
|
|
//
|
|
// PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102
|
|
//
|
|
Device (PS2K) {
|
|
Name (_HID, EISAID ("PNP0303"))
|
|
Name (_CID, EISAID ("PNP030B"))
|
|
Name(_CRS,ResourceTemplate() {
|
|
IO (Decode16, 0x60, 0x60, 0x00, 0x01)
|
|
IO (Decode16, 0x64, 0x64, 0x00, 0x01)
|
|
IRQNoFlags () {1}
|
|
//
|
|
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// PS/2 Mouse and Microsoft Mouse
|
|
//
|
|
Device (PS2M) { // PS/2 stype mouse port
|
|
Name (_HID, EISAID ("PNP0F03"))
|
|
Name (_CID, EISAID ("PNP0F13"))
|
|
Name (_CRS, ResourceTemplate() {
|
|
IRQNoFlags () {12}
|
|
//
|
|
// list of IRQs occupied thus far:
|
|
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// UART Serial Port - COM1
|
|
//
|
|
Device (UAR1) {
|
|
Name (_HID, EISAID ("PNP0501"))
|
|
Name (_DDN, "COM1")
|
|
Name (_UID, 0x01)
|
|
Name(_CRS,ResourceTemplate() {
|
|
IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)
|
|
IRQ (Edge, ActiveHigh, Exclusive, ) {4}
|
|
//
|
|
// list of IRQs occupied thus far:
|
|
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// UART Serial Port - COM2
|
|
//
|
|
Device (UAR2) {
|
|
Name (_HID, EISAID ("PNP0501"))
|
|
Name (_DDN, "COM2")
|
|
Name (_UID, 0x02)
|
|
Name(_CRS,ResourceTemplate() {
|
|
IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)
|
|
IRQ (Edge, ActiveHigh, Exclusive, ) {3}
|
|
//
|
|
// list of IRQs occupied thus far:
|
|
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3
|
|
//
|
|
})
|
|
}
|
|
|
|
//
|
|
// Floppy Disk Controller
|
|
//
|
|
Device (FDC) {
|
|
Name (_HID, EISAID ("PNP0700"))
|
|
Name (_CRS,ResourceTemplate() {
|
|
IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)
|
|
IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)
|
|
IRQNoFlags () {6}
|
|
//
|
|
// list of IRQs occupied thus far:
|
|
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6
|
|
//
|
|
DMA (Compatibility, NotBusMaster, Transfer8) {2}
|
|
})
|
|
}
|
|
|
|
//
|
|
// parallel port -- no DMA for now
|
|
//
|
|
Device (PAR1) {
|
|
Name (_HID, EISAID ("PNP0400"))
|
|
Name (_DDN, "LPT1")
|
|
Name (_UID, 0x01)
|
|
Name(_CRS, ResourceTemplate() {
|
|
IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)
|
|
IRQNoFlags () {7}
|
|
//
|
|
// list of IRQs occupied thus far:
|
|
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7
|
|
// in order:
|
|
// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
|
|
//
|
|
})
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|