mirror of https://github.com/acidanthera/audk.git
164 lines
4.6 KiB
NASM
164 lines
4.6 KiB
NASM
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; SmiEntry.nasm
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;
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; Abstract:
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;
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; Code template of the SMI handler for a particular processor
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;
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;-------------------------------------------------------------------------------
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%define DSC_OFFSET 0xfb00
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%define DSC_GDTPTR 0x30
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%define DSC_GDTSIZ 0x38
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%define DSC_CS 14
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%define DSC_DS 16
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%define DSC_SS 18
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%define DSC_OTHERSEG 20
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%define PROTECT_MODE_CS 0x8
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%define PROTECT_MODE_DS 0x20
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%define TSS_SEGMENT 0x40
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extern ASM_PFX(SmiRendezvous)
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extern ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
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extern ASM_PFX(CpuSmmDebugEntry)
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extern ASM_PFX(CpuSmmDebugExit)
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global ASM_PFX(gcSmiHandlerTemplate)
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global ASM_PFX(gcSmiHandlerSize)
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global ASM_PFX(gSmiCr3)
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global ASM_PFX(gSmiStack)
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global ASM_PFX(gSmbase)
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extern ASM_PFX(gSmiHandlerIdtr)
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SECTION .text
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BITS 16
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ASM_PFX(gcSmiHandlerTemplate):
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_SmiEntryPoint:
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mov bx, _GdtDesc - _SmiEntryPoint + 0x8000
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mov ax,[cs:DSC_OFFSET + DSC_GDTSIZ]
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dec ax
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mov [cs:bx], ax
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mov eax, [cs:DSC_OFFSET + DSC_GDTPTR]
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mov [cs:bx + 2], eax
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mov ebp, eax ; ebp = GDT base
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o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx]
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mov ax, PROTECT_MODE_CS
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mov [cs:bx-0x2],ax
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DB 0x66, 0xbf ; mov edi, SMBASE
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ASM_PFX(gSmbase): DD 0
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lea eax, [edi + (@32bit - _SmiEntryPoint) + 0x8000]
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mov [cs:bx-0x6],eax
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mov ebx, cr0
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and ebx, 0x9ffafff3
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or ebx, 0x23
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mov cr0, ebx
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jmp dword 0x0:0x0
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_GdtDesc:
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DW 0
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DD 0
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BITS 32
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@32bit:
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mov ax, PROTECT_MODE_DS
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o16 mov ds, ax
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o16 mov es, ax
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o16 mov fs, ax
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o16 mov gs, ax
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o16 mov ss, ax
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DB 0xbc ; mov esp, imm32
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ASM_PFX(gSmiStack): DD 0
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mov eax, ASM_PFX(gSmiHandlerIdtr)
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lidt [eax]
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jmp ProtFlatMode
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ProtFlatMode:
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DB 0xb8 ; mov eax, imm32
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ASM_PFX(gSmiCr3): DD 0
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mov cr3, eax
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;
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; Need to test for CR4 specific bit support
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;
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mov eax, 1
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cpuid ; use CPUID to determine if specific CR4 bits are supported
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xor eax, eax ; Clear EAX
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test edx, BIT2 ; Check for DE capabilities
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jz .0
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or eax, BIT3
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.0:
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test edx, BIT6 ; Check for PAE capabilities
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jz .1
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or eax, BIT5
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.1:
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test edx, BIT7 ; Check for MCE capabilities
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jz .2
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or eax, BIT6
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.2:
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test edx, BIT24 ; Check for FXSR capabilities
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jz .3
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or eax, BIT9
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.3:
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test edx, BIT25 ; Check for SSE capabilities
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jz .4
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or eax, BIT10
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.4: ; as cr4.PGE is not set here, refresh cr3
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mov cr4, eax ; in PreModifyMtrrs() to flush TLB.
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mov ebx, cr0
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or ebx, 0x080010000 ; enable paging + WP
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mov cr0, ebx
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lea ebx, [edi + DSC_OFFSET]
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mov ax, [ebx + DSC_DS]
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mov ds, eax
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mov ax, [ebx + DSC_OTHERSEG]
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mov es, eax
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mov fs, eax
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mov gs, eax
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mov ax, [ebx + DSC_SS]
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mov ss, eax
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cmp byte [dword ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))], 0
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jz .5
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; Load TSS
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mov byte [ebp + TSS_SEGMENT + 5], 0x89 ; clear busy flag
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mov eax, TSS_SEGMENT
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ltr ax
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.5:
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; jmp _SmiHandler ; instruction is not needed
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global ASM_PFX(SmiHandler)
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ASM_PFX(SmiHandler):
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mov ebx, [esp] ; CPU Index
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push ebx
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mov eax, ASM_PFX(CpuSmmDebugEntry)
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call eax
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pop ecx
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push ebx
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mov eax, ASM_PFX(SmiRendezvous)
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call eax
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pop ecx
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push ebx
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mov eax, ASM_PFX(CpuSmmDebugExit)
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call eax
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pop ecx
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rsm
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ASM_PFX(gcSmiHandlerSize): DW $ - _SmiEntryPoint
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